參數(shù)資料
型號： M30600M8-XXXGP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù)： 33/139頁
文件大?。?/td> 1782K
代理商： M30600M8-XXXGP
Mitsubishi microcomputers
M16C / 60 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
128
VCC = 3V
Table 1.84. Memory expansion and microprocessor modes
(when accessing external memory area with wait, and select multiplexed bus)
Symbol
Standard
Measuring condition
Max.
Min.
Parameter
Unit
td(BCLK-AD)
Address output delay time
60
ns
th(BCLK-AD)
Address output hold time (BCLK standard)
4
ns
td(BCLK-CS)
Chip select output delay time
60
ns
th(BCLK-CS)
Chip select output hold time (BCLK standard)
4
ns
th(RD-AD)
Address output hold time (RD standard)
(Note)
td(BCLK-RD)
RD signal output delay time
60
ns
th(BCLK-RD)
RD signal output hold time
0
ns
th(WR-AD)
Address output hold time (WR standard)
(Note)
td(BCLK-WR)
WR signal output delay time
60
ns
td(BCLK-DB)
Data output delay time (BCLK standard)
80
ns
th(BCLK-DB)
Data output hold time (BCLK standard)
4
ns
td(DB-WR)
Data output delay time (WR standard)
(Note)
ns
th(BCLK-ALE)
ALE signal output hold time (BCLK standard)
– 4
ns
td(AD-ALE)
ALE signal output delay time (Address standard)
(Note)
ns
th(ALE-AD)
ALE signal output hold time(Address standard)
50
ns
th(BCLK-WR)
WR signal output hold time
0
ns
th(RD-CS)
Chip select output hold time (RD standard)
(Note)
th(WR-CS)
Chip select output hold time (WR standard)
(Note)
ns
td(AD-RD)
Post-address RD signal output delay time
ns
0
td(AD-WR)
Post-address WR signal output delay time
ns
0
tdZ(RD-AD)
Address output floating start time
ns
8
td(BCLK-ALE)
ALE signal output delay time (BCLK standard)
ns
60
Note: Calculated according to the BCLK frequency as follows:
th(RD – AD) =
f(BCLK) X 2
10
9
[ns]
th(WR – AD) =
f(BCLK) X 2
10
9
[ns]
th(RD – CS) =
f(BCLK) X 2
10
9
[ns]
th(WR – CS) =
f(BCLK) X 2
10
9
[ns]
td(DB – WR) =
f(BCLK) X 2
– 80
[ns]
10
9
X 3
td(AD – ALE) =
f(BCLK) X 2
10
9
– 60
[ns]
th(WR – DB) =
f(BCLK) X 2
10
9
[ns]
th(WR-DB)
Data output hold time (WR standard)
ns
(Note)
Switching characteristics (referenced to VCC = 3V, VSS = 0V at Ta = 25oC, CM15 = “1” unless
otherwise specified)
Timing (Vcc = 3V)
Figure 1.90
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