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參數(shù)資料
| 型號(hào)： | M30612M4A |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單片16位CMOS微機(jī) |
| 文件頁(yè)數(shù)： | 115/197頁(yè) |
| 文件大小： | 2673K |
| 代理商： | M30612M4A |
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Mitsubishi microcomputers
M16C / 61 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
A-D Converter
115
Item
Performance
Method of A-D conversion Successive approximation (capacitive coupling amplifier)
Analog input voltage (Note 1)
0V to AV
CC
(V
CC
)
Operating clock
φ
AD (Note 2)
V
CC
= 5V
f
AD
/divide-by-2 of f
AD
/divide-by-4 of f
AD
, f
AD
=f(X
IN
)
V
CC
= 3V
divide-by-2 of f
AD
/divide-by-4 of f
AD
, f
AD
=f(X
IN
)
Resolution
8-bit or 10-bit (selectable)
Absolute precision
V
CC
= 5V
Without sample and hold function
±
3LSB
With sample and hold function (8-bit resolution)
±
2LSB
With sample and hold function (10-bit resolution)
AN
0
to AN
7
input :
±
3LSB
ANEX0 and ANEX1 input (including mode in which external
operation amp is connected) :
±
7LSB
V
CC
= 3V
Without sample and hold function (8-bit resolution)
±
2LSB
Operating modes
One-shot mode, repeat mode, single sweep mode, repeat sweep mode 0,
and repeat sweep mode 1
Analog input pins
8pins (AN
0
to AN
7
) + 2pins (ANEX0 and ANEX1)
A-D conversion start condition
Software trigger
A-D conversion starts when the A-D conversion start flag changes to “1”
External trigger (can be retriggered)
AD
TRG
/P9
7
input changes from “H” to “L”
Conversion speed per pin Without sample and hold function
8-bit resolution: 49
φ
AD
cycles
,
10-bit resolution: 59
φ
AD
cycles
With sample and hold function
8-bit resolution: 28
φ
AD
cycles
,
10-bit resolution: 33
φ
AD
cycles
Note 1: Does not depend on use of sample and hold function.
Note 2: Without sample and hold function, set the
φ
AD
frequency to 250kHz min.
With the sample and hold function, set the
φ
AD
frequency to 1MHz min.
A-D Converter
The A-D converter consists of one 10-bit successive approximation A-D converter circuit with a capacitive coupling
amplifier. Pins P10
0
to P10
7
, P9
5
, and P9
6
also function as the analog signal input pins. The direction registers of
these pins for A-D conversion must therefore be set to input. The Vref connect bit (bit 5 at address 03D7
16
) can be
used to isolate the resistance ladder of the A-D converter from the reference voltage input pin (V
REF
) when the A-D
converter is not used. Doing so stops any current flowing into the resistance ladder from V
REF
, reducing the power
dissipation. When using the A-D converter, start A-D conversion only after setting bit 5 of 03D7
16
to connect V
REF
.
The result of A-D conversion is stored in the A-D registers of the selected pins. When set to 10-bit precision, the low
8 bits are stored in the even addresses and the high 2 bits in the odd addresses. When set to 8-bit precision, the low
8 bits are stored in the even addresses.
Table 1.18.1 shows the performance of the A-D converter. Figure 1.18.1 shows the block diagram of the A-
D converter, and Figures 1.18.2 and 1.18.3 show the A-D converter-related registers.
Table 1.18.1. Performance of A-D converter
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|---|---|
| M30612M4A-417GP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
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| M30612M4A-XXXGP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
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