參數(shù)資料
型號(hào)： M30612MA-323FP
廠商： Mitsubishi Electric Corporation
英文描述： Silver Mica Capacitor; Capacitance:15pF; Capacitance Tolerance:+/- 5%; Series:CM04; Voltage Rating:500VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:3.6mm; Leaded Process Compatible:No RoHS Compliant: No
中文描述： 單片16位CMOS微機(jī)
文件頁(yè)數(shù)： 24/197頁(yè)
文件大?。?/td> 2673K
代理商： M30612MA-323FP
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Mitsubishi microcomputers
M16C / 61 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Bus Control
24
W
Function
Bit symbol
Bit name
Chip select control register
Symbol
CSR
Address
0008
16
When reset
01
16
R
b7
b6
b5
b4
b3
b2
b1
b0
CS1
CS0
CS3
CS2
CS0 output enable bit
CS1 output enable bit
CS2 output enable bit
CS3 output enable bit
CS1W
CS0W
CS3W
CS2W
CS0 wait bit
CS1 wait bit
CS2 wait bit
CS3 wait bit
0 : Chip select output disabled
(Normal port pin)
1 : Chip select output enabled
0 : Wait state inserted
1 : No wait state
AA
AA
AA
AA
AA
AA
Figure 1.11.1. Chip select control register
Table 1.11.1. External areas specified by the chip select signals
Chip select
Specified address range
Memory expansion mode
30000
16
to CFFFF
16
(640K)
30000
16
to F7FFF
16
(800K)
Microprocessor mode
(Note)
CS0
CS1
CS2
CS3
28000
16
to 2FFFF
16
08000
16
to 27FFF
16
04000
16
to 07FFF
16
(32K)
(128K)
(16K)
30000
16
to FFFFF
16
(832K)
28000
16
to 2FFFF
16
08000
16
to 27FFF
16
(128K)
04000
16
to 07FFF
16
(32K)
(16K)
Note: When PM16 (External memory area expansion bit) = “1”. (Only M30612M4A/E4 is valid.)
Bus Control
The following explains the signals required for accessing external devices and software waits. The signals
required for accessing the external devices are valid when the processor mode is set to memory expansion
mode and microprocessor mode. The software waits are valid in all processor modes.
(1) Address bus/data bus
The address bus consists of the 20 pins A
0
to A
19
for accessing the 1M bytes of address space.
The data bus consists of the pins for data I/O. When the BYTE pin is “H”, the 8 ports D
0
to D
7
function as
the data bus. When BYTE is “L”, the 16 ports D
0
to D
15
function as the data bus.
Both the address and data bus retain their previous states when internal ROM or RAM is accessed. Also,
when a change is made from single-chip mode to memory expansion mode, the value of the address bus
is undefined until external memory is accessed.
(2) Chip select signal
The chip select signal is output using the same pins as P4
4
to P4
7
. Bits 0 to 3 of the chip select control
register (address 0008
16
) set each pin to function as a port or to output the chip select signal. The chip
select control register is valid in memory expansion mode and microprocessor mode. In single-chip
mode, P4
4
to P4
7
function as programmable I/O ports regardless of the value in the chip select control
register.
CS1 to CS3 function as input ports. Therefore, when using CS1 to CS3, external pull-up resistors are
required. Figure 1.11.1 shows the chip select control register.
The chip select signal can be used to split the external area into as many as four blocks. Table 1.11.1
shows the external memory areas specified using the chip select signal.
相關(guān)PDF資料
PDF描述
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參數(shù)描述
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