參數(shù)資料
型號(hào): M30612MCA-XXXGP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁(yè)數(shù): 152/197頁(yè)
文件大小: 2673K
代理商: M30612MCA-XXXGP
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Mitsubishi microcomputers
M16C / 61 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Precautions for Interrupts
58
______
Figure 1.13.12. Switching condition of INT interrupt request
Set the polarity select bit
Clear the interrupt request bit to “0”
Set the interrupt priority level to level 1 to 7
(Enable the accepting of INTi interrupt request)
Set the interrupt priority level to level 0
(Disable INTi interrupt)
Clear the interrupt enable flag to “0”
(Disable interrupt)
Set the interrupt enable flag to “1”
(Enable interrupt)
Example 1:
INT_SWITCH1:
FCLR
I
; Disable interrupts.
AND.B
#00h, 0055h
; Clear TA0IC int. priority level and int. request bit.
NOP
; Four NOP instructions are required when using HOLD function.
NOP
FSET
I
; Enable interrupts.
Example 2:
INT_SWITCH2:
FCLR
I
; Disable interrupts.
AND.B
#00h, 0055h
; Clear TA0IC int. priority level and int. request bit.
MOV.W MEM, R0
; Dummy read.
FSET
I
; Enable interrupts.
Example 3:
INT_SWITCH3:
PUSHC FLG
; Push Flag register onto stack
FCLR
I
; Disable interrupts.
AND.B
#00h, 0055h
; Clear TA0IC int. priority level and int. request bit.
POPC
FLG
; Enable interrupts.
The reason why two NOP instructions (four when using the HOLD function) or dummy read are inserted
before FSET I in Examples 1 and 2 is to prevent the interrupt enable flag I from being set before the
interrupt control register is rewritten due to effects of the instruction queue.
(5) Rewrite the interrupt control register
To rewrite the interrupt control register, do so at a point that does not generate the interrupt request for
that register. If there is possibility of the interrupt request occur, rewrite the interrupt control register after
the interrupt is disabled. The program examples are described as follow:
When a instruction to rewrite the interrupt control register is executed but the interrupt is disabled, the
interrupt request bit is not set sometimes even if the interrupt request for that register has been gener-
ated. This will depend on the instruction. If this creates problems, use the below instructions to change
the register.
Instructions : AND, OR, BCLR, BSET
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