
44
Tentative Specifications REV.A
S
pecifications in this manual are tentative and subject to change.
Clock Generating Circuit
Mitsubishi microcomputers
M16C / 62T Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
deveopmen
Clock Output
In single-chip mode, the clock output function select bits (bits 0 and 1 at address 0006
16
) enable f
8
, f
32
, or
fc to be output from the P5
7
/CLK
OUT
pin. When the WAIT peripheral function clock stop bit (bit 2 at address
0006
16
) is set to “1”, the output of f
8
and f
32
stops when a WAIT instruction is executed.
Stop Mode
Writing “1” to the all-clock stop control bit (bit 0 at address 0007
16
) stops all oscillation and the microcom-
puter enters stop mode. In stop mode, the content of the internal RAM is retained provided that V
CC
re-
mains above 2V.
Because the oscillation , BCLK, f
1
to f
32
, f
1SIO2
to f
32SIO2
, f
C
, f
C32
, and f
AD
stops in stop mode, peripheral
functions such as the A-D converter and watchdog timer do not function. However, timer A and timer B
operate provided that the event counter mode is set to an external pulse, and UARTi(i = 0 to 2) functions
provided an external clock is selected. Table 1.13.2 shows the status of the ports in stop mode.
Stop mode is cancelled by a hardware reset or interrupt. If an interrupt is to be used to cancel stop mode,
that interrupt must first have been enabled.
When shifting to stop mode, the main clock division select bit 0 (bit 6 at 0006
16
) is set to “1”.
Note 1:
In M30623(80-pin package), CS0 to CS3 have no corresponding external pin, but are internally the
above conditions.
Table 1.13.2. Port status during stop mode
Pin
Memory expansion mode
Microprocessor mode
Single-chip mode
Address bus, data bus, CS0 to CS3
RD, WR, BHE, WRL, WRH
__________
“H”
ALE
“H”
Port
CLK
OUT
When fc selected
When f
8
, f
32
selected
Retains status before stop mode
“H”
Retains status before stop mode
Valid only in single-chip mode
Valid only in single-chip mode
Retains status before stop mode
“H”
Retains status before stop mode