
Interrupt
Mitsubishi microcomputers
M16C / 62A Group (80-pin)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
42
Figure 1.10.3. Interrupt control registers
Symbol
INTiIC(i=3)
SiIC/INTjIC (i=4, 3)
Address
When reset
XX00X000
2
XX00X000
2
XX00X000
2
XX00X000
2
0044
16
0048
16
, 0049
16
0048
16
, 0049
16
005D
16
to 005F
16
(j=5, 4)
INTiIC(i=0 to 2)
Bit name
Function
Bit symbol
ILVL0
W
R
b7
b6
b5
0
b4
b3
b2
b1
b0
AA
IR
POL
Interrupt priority level
select bit
Interrupt request bit
Polarity select bit
Reserved bit
0: Interrupt not requested
1: Interrupt requested
0 : Selects falling edge
1 : Selects rising edge
Always set to “0”
ILVL1
ILVL2
Note 1: This bit can only be accessed for reset (= 0), but cannot be accessed for set (= 1).
Note 2: INT3 to INT5 interrupts cannot be used. However, must set INT3IC to "00
16
". INT4IC
and INT5IC are shared with S3IC and S4IC respectively. When not using as S3IC and
S4IC, must set INT3IC and INT4IC to "00
16
".
Note 3: To rewrite the interrupt control register, do so at a point that dose not generate the
interrupt request for that register. For details, see the precautions for interrupts.
Interrupt control register (Note 2)
b7
b6
b5
b4
b3
b2
b1
b0
AAA
AAA
Bit name
Function
Bit symbol
ILVL0
W
R
AAA
AAA
AAA
Symbol
Address
0045
16
to 0047
16
When reset
XXXXX000
2
XXXXX000
2
XXXXX000
2
XXXXX000
2
XXXXX000
2
XXXXX000
2
XXXXX000
2
XXXXX000
2
XXXXX000
2
TBiIC(i=3 to 5)
BCNIC
DMiIC(i=0, 1)
KUPIC
ADIC
SiTIC(i=0 to 2)
SiRIC(i=0 to 2)
TAiIC(i=0 to 4)
TBiIC(i=0 to 2)
004A
16
004B
16
, 004C
16
004D
16
004E
16
0051
16
, 0053
16
, 004F
16
0052
16
, 0054
16
, 0050
16
0055
16
to 0059
16
005A
16
to 005C
16
IR
Interrupt priority level
select bit
Interrupt request bit
0 : Interrupt not requested
1 : Interrupt requested
ILVL1
ILVL2
(Note 1)
Note 1: This bit can only be accessed for reset (= 0), but cannot be accessed for set (= 1).
Note 2: To rewrite the interrupt control register, do so at a point that dose not generate the
interrupt request for that register. For details, see the precautions for interrupts.
0 0 0 : Level 0 (interrupt disabled)
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
b2 b1 b0
0 0 0 : Level 0 (interrupt disabled)
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
b2 b1 b0
AAA
AAA
AAA
AAA
AAA
AAA
AAA
AAA
AAA
Nothing is assigned.
In an attempt to write to these bits, write “0”. The value, if read, turns
out to be
indeterminate.
Nothing is assigned.
In an attempt to write to these bits, write “0”. The value, if read, turns
out to be
indeterminate.