Tentative Specifications REV.A
S
pecifications in this manual are tentative and subject to change.
Pin Description
Mitsubishi microcomputers
M16C / 62T Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
deveopmen
10
Pin Description
Pin name
P4
0
to P4
7
CS
0
to CS
3
,
A
16
to A
19
P5
0
to P5
7
_________ _______
RD,
__________
HOLD,
________
P6
0
to P6
7
P7
0
to P7
7
P8
0
to P8
4
,
P8
6
,
P8
7
,
P8
5
P9
0
to P9
7
P10
0
to P10
7
Signal name
I/O port P4
I/O port P5
I/O port P6
I/O port P7
I/O port P8
I/O port P8
5
I/O port P9
I/O port P10
I/O type
Input/output
Output
Output
Input/output
Output
Output
Output
Output
Output
Input
Output
Input
Input/output
Input/output
Input/output
Input/output
Input/output
Input
Input/output
Input/output
Function
This is an 8-bit I/O port equivalent to P0.
These pins output CS
0
–CS
3
signals and A
16
–A
19
. CS
0
–CS
3
are
chip select signals used to specify an access space. A
16
–A
19
are 4
high-order address bits.
This is an 8-bit I/O port equivalent to P0. In single-chip mode, P5
7
in
this port outputs a divide-by-8 or divide-by-32 clock of X
IN
or a clock
of the same frequency as X
CIN
as selected by software.
Output WRL, WRH (WR and BHE), RD, BCLK, HLDA, and ALE
signals. WRL and WRH, and BHE and WR can be switched using
software control.
I
WRL, WRH, and RD selected
With a 16-bit external data bus, data is written to even addresses
WRH signal is “L”. Data is read when RD is “L”.
I
WR, BHE, and RD selected
Data is written when WR is “L”. Data is read when RD is “L”. Odd
addresses are accessed when BHE is “L”. Use this mode when
using an 8-bit external data bus.
While the input level at the HOLD pin is “L”, the microcomputer is
placed in the hold state. While in the hold state, HLDA outputs a
“L” level. ALE is used to latch the address. While the input level of
the RDY pin is “L”, the microcomputer is in the ready state.
This is an 8-bit I/O port equivalent to P0. Pins in this port also
function as UART0 and UART1 I/O pins as selected by software.
This is an 8-bit I/O port equivalent to P0 (P7
0
and P7
1
are N channel
open-drain output). Pins in this port also function as timer A
0
–A
3
,
timer B5 or UART2 I/O pins as selected by software.
P8
0
to P8
4
, P8
6
and P8
7
are I/O ports with the same functions as P0.
Using software, they can be made to function as the I/O pins for
timer A4 and the input pins for external interrupts. P8
6
and P8
7
can
be set using software to function as the I/O pins for a sub clock
generation circuit. In this case, connect a quartz oscillator between
P8
6
(X
COUT
pin) and P8
7
(X
CIN
pin). P8
5
is an input-only port that
also functions for NMI. The NMI interrupt is generated when the
input at this pin changes from “H” to “L”. The NMI function cannot be
cancelled using software. The pull-up cannot be set for this pin.
This is an 8-bit I/O port equivalent to P0. Pins in this port also
function as SI/O 3, 4 I/O pins, timer B0–B4 input pins, D-A converter
output pins, A-D converter extended input pins, or A-D trigger input
pins as selected by software.
This is an 8-bit I/O port equivalent to P0. Pins in this port also
funciton as A-D converter input pins. Furthermore, P10
4
–P10
7
also
function as input pins for the key input interrupt function.
Note 1: In M30623(80-pin package), the following signals do not have the corresponding external pin.
G
P1
0
/D
4
/D
12
, P1
5
/D
13
/INT
3
to P1
7
/D
15
/INT
5
G
P4
4
/CS0 to P4
7
/CS3
G
P7
2
/CLK
2
/TA1
OUT
/V, P7
3
/CST
2
/RTS
2
/TA1
IN
/V, P7
4
/TA2
OUT
/W, P7
5
/TA2
IN
/W
G
P9
1
/TB1
IN
/S
IN3
Note 2: The M16C/62T group is not guaranteed to operate in memory expansion and microprocessor modes.