參數(shù)資料
型號: M30623M8P-XXXGP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP80
封裝: 14 X 14 MM, 0.65 MM PITCH, PLASTIC, QFP-80
文件頁數(shù): 74/104頁
文件大?。?/td> 1313K
代理商: M30623M8P-XXXGP
5. Electrical Characteristics
Rev.2.41
Jan 10, 2006
Page 69 of 96
REJ03B0001-0241
VCC1=VCC2=3V
Timing Requirements
(VCC1 = VCC2 = 3V, VSS = 0V, at Topr =
20 to 85°C / 40 to 85°C unless otherwise specified)
Table 5.40
Timer B Input (Counter Input in Event Counter Mode)
Symbol
Parameter
Standard
Unit
Min.
Max.
tc(TB)
TBiIN Input Cycle Time (counted on one edge)
150
ns
tw(TBH)
TBiIN Input HIGH Pulse Width (counted on one edge)
60
ns
tw(TBL)
TBiIN Input LOW Pulse Width (counted on one edge)
60
ns
tc(TB)
TBiIN Input Cycle Time (counted on both edges)
300
ns
tw(TBH)
TBiIN Input HIGH Pulse Width (counted on both edges)
120
ns
tw(TBL)
TBiIN Input LOW Pulse Width (counted on both edges)
120
ns
Table 5.41
Timer B Input (Pulse Period Measurement Mode)
Symbol
Parameter
Standard
Unit
Min.
Max.
tc(TB)
TBiIN Input Cycle Time
600
ns
tw(TBH)
TBiIN Input HIGH Pulse Width
300
ns
tw(TBL)
TBiIN Input LOW Pulse Width
300
ns
Table 5.42
Timer B Input (Pulse Width Measurement Mode)
Symbol
Parameter
Standard
Unit
Min.
Max.
tc(TB)
TBiIN Input Cycle Time
600
ns
tw(TBH)
TBiIN Input HIGH Pulse Width
300
ns
tw(TBL)
TBiIN Input LOW Pulse Width
300
ns
Table 5.43
A/D Trigger Input
Symbol
Parameter
Standard
Unit
Min.
Max.
tc(AD)
ADTRG Input Cycle Time
1500
ns
tw(ADL)
ADTRG Input LOW Pulse Width
200
ns
Table 5.44
Serial Interface
Symbol
Parameter
Standard
Unit
Min.
Max.
tc(CK)
CLKi Input Cycle Time
300
ns
tw(CKH)
CLKi Input HIGH Pulse Width
150
ns
tw(CKL)
CLKi Input LOW Pulse Width
150
ns
td(C-Q)
TXDi Output Delay Time
160
ns
th(C-Q)
TXDi Hold Time
0
ns
tsu(D-C)
RXDi Input Setup Time
100
ns
th(C-D)
RXDi Input Hold Time
90
ns
Table 5.45
External Interrupt INTi Input
Symbol
Parameter
Standard
Unit
Min.
Max.
tw(INH)
INTi Input HIGH Pulse Width
380
ns
tw(INL)
INTi Input LOW Pulse Width
380
ns
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