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參數(shù)資料
| 型號(hào)： | M30623MAA-2ATGP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單片16位CMOS微機(jī) |
| 文件頁數(shù)： | 26/184頁 |
| 文件大小： | 1734K |
| 代理商： | M30623MAA-2ATGP |
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26
Tentative Specifications REV.A
S
pecifications in this manual are tentative and subject to change.
Memory Space Expansion Functions
Mitsubishi microcomputers
M16C / 62T Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
deveopmen
The data bank register is made up of the bank selection bits (bits 5 through 3) and the offset bit (bit 2). The
bank selection bits are used to set a bank number for accessing data lying between 40000
16
and
BFFFF
16
. Assigning 1 to the offset bit provides the means to set offsets covering 40000
16
.
Figure 1.8.5 shows the memory location and chip select areas in expansion mode 2.
The area relevant to CS0 ranges from 40000
16
through FFFFF
16
. As for the area from 40000
16
through
BFFFF
16
, the bank number set by use of the bank selection bits are output from the output terminals CS3
- CS1 only in accessing data. In fetching a program, bank 7 (111
2
area from C0000
16
through FFFFF
16
, bank 7 (111
2
) is output from CS3 - CS1 without regard to accessing
data or to fetching a program.
In accessing an area irrelevant to CS0, a chip select signal CS3 (4000
16
- 7FFF
16
), CS2 (8000
16
-
27FFF
16
), and CS1 (28000
16
- 3FFFF
16
) is output depending on the address as in the past.
Figure 1.8.6 shows an example of connecting the MCU with a 4-M byte ROM and to a 128-K byte SRAM.
Connect the chip select of 4-M byte ROM with CS0. Connect M16C’s CS3, CS2, and CS1 with address
inputs A21, A20, and A19 respectively. Connect M16C’s output A19 with address input A18. Figure 1.8.7
shows the relationship between addresses of the 4-M byte ROM and those of M16C.
An example of connecting the MCU with
external memories in expansion mode 2
(M30622MC, Microprocessor mode)
17
8
M
D0 to D7
A0 to A16
A17
A19
RD
CS0
WR
CS1
CS2
CS3
4
D0 to D7
A0 to A16
A17
A18
A19
A20
A21
OE
CS
1
DQ0 to
DQ7
A0 to A16
S2
S1
W
OE
Note 1. If only one chip select terminal (S1 or S2) is present,
decoding by use of an external circuit is required.
Note 2. M30623(80-pin package) is not provided with the
output pin for the chip select signal.
Note 3. The M16C/62T group is not guaranteed to operate
in memory expansion and microprocessor modes.
With no offsets effected,
banks switch from one 512-K
byte segment to another
512-K byte segment. Bank
selection bits need to be
changed in dealing with data
lying across the boundary
between banks every time a
bank switches to another.
Assigning 1 to the offset bit
brings about offsets covering
40000
16
so that data can be
accessed without changing
the bank selection bits. For
instance, accessing 80000
16
of bank 0 with offsets ef-
fected causes the output
bank number to turn to 1, and
AD19 is inverted to be out-
put; this results in accessing
40000
16
of bank 1.
On the other hand, the
SRAM’s chip select assumes
that CS0=1 (not selected)
and CS2=0 (selected), so
connect CS0 with S2 and
CS2 with S1. If the SRAM
doesn’t have a bipolar chip
CS0 and CS2 externally.
Figure 1.8.6. An example of connecting the MCU with external
memories in expansion mode 2
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