參數(shù)資料
型號: M30623MAA-2M1GP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述: 單片16位CMOS微機
文件頁數(shù): 11/184頁
文件大?。?/td> 1734K
代理商: M30623MAA-2M1GP
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11
Tentative Specifications REV.A
S
pecifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M16C / 62T Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
deveopmen
Memory
Operation of Functional Blocks
The M16C/62T group accommodates certain units in a single chip. These units include ROM and RAM to
store instructions and data and the central processing unit (CPU) to execute arithmetic/logic operations.
Also included are peripheral units such as timers, serial I/O, D-A converter, DMAC, CRC calculation circuit,
A-D converter, and I/O ports.
The following explains each unit.
Memory
Figure 1.4.1 is a memory map of the M16C/62T group. The address space extends the 1M bytes from
address 00000
16
to FFFFF
16
.
Internal ROM is located as the following, in M30623M4T-XXXGP from address F8000
16
to FFFFF
16
(32K
bytes), in M30622M8T/M8V-XXXFP and M30623M8T/M8V-XXXGP from address F0000
16
to FFFFF
16
(64K bytes), in M30622MCT/MCV-XXXFP and M30623MCT/MCV-XXXGP from address E0000
16
to
FFFFF
16
(128K bytes).
The vector table for fixed interrupts such as the reset and NMI are mapped to FFFDC
16
to FFFFF
16
. The
starting address of the interrupt routine is stored here. The address of the vector table for timer interrupts,
etc., can be set as desired using the internal register (INTB). See the section on interrupts for details.
Internal RAM is located as the following, in M30623M4T-XXXGP from address 00400
16
to 00FFF
16
(3K
bytes), in M30622M8T/M8V-XXXFP and
M30623M8T/M8V-XXXGP from address 00400
16
to 013FF
16
(4K
bytes), in M30622MCT/MCV-XXXFP and M30623MCT/MCV-XXXGP from address 00400
16
to 017FF
16
(5K bytes).
In addition to storing data, the RAM also stores the stack used when calling subroutines and
when interrupts are generated.
The SFR area is mapped to 00000
16
to 003FF
16
. This area accommodates the control registers for
peripheral devices such as I/O ports, A-D converter, serial I/O, and timers, etc. Figures 1.7.1 to 1.7.3 are
location of peripheral unit control registers. Any part of the SFR area that is not occupied is reserved and
cannot be used for other purposes.
The special page vector table is mapped to FFE00
16
to FFFDB
16
. If the starting addresses of subroutines
or the destination addresses of jumps are stored here, subroutine call instructions and jump instructions
can be used as 2-byte instructions, reducing the number of program steps.
In memory expansion mode and microprocessor mode, a part of the spaces are reserved and cannot be
used. For example, in the M30623MCT/MCV-XXXGP, the following spaces cannot be used.
The space between 01000
16
and 03FFF
16
(Memory expansion and microprocessor modes)
The space between D0000
16
and D7FFF
16
(Memory expansion mode)
But the M16C/62T group is not guaranteed to operate in memory expansion and microprocessor modes.
Figure 1.4.1. Memory map
SFR area
For details, see Figures
1.7.1 to 1.7.3
Internal RAM area
External area
Internal RAM area
Reset
Watchdog timer
DBC
NMI
Single step
Address match
BRK instruction
Overflow
Undefined instruction
Special page
vector table
00000
16
00400
16
04000
16
FFFFF
16
FFFDC
16
FFE00
16
FFFFF
16
XXXXX
16
YYYYY
16
D0000
16
Type No.
XXXXX
16
YYYYY
16
00FFF
16
M30623M4T-XXXGP
M30622M8T/M8V-XXXFP
M30623M8T/M8V-XXXGP
M30622MCT/MCV-XXXFP
M30623MCT/MCV-XXXGP
F8000
16
013FF
16
F0000
16
017FF
16
E0000
16
Internal reserved area
(Note 1)
Internal reserved area
(Note 1)
Note 1. In memory expansion and microprocessor modes,
can not be used.
Note 2. In memory expansion mode, can not be used.
Note 3. The M16C/62T group is not guaranteed to operate
in memory expansion and microprocessor modes.
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相關代理商/技術參數(shù)
參數(shù)描述
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