參數(shù)資料
型號: M30623MCV-XXXGP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80
封裝: PLASTIC, QFP-80
文件頁數(shù): 107/187頁
文件大?。?/td> 2666K
代理商: M30623MCV-XXXGP
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26
Mitsubishi microcomputers
M16C / 62T Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Memory Space Expansion Functions
The data bank register is made up of the bank selection bits (bits 5 through 3) and the offset bit (bit 2). The
bank selection bits are used to set a bank number for accessing data lying between 4000016 and
BFFFF16. Assigning 1 to the offset bit provides the means to set offsets covering 4000016.
Figure 1.8.5 shows the memory location and chip select areas in expansion mode 2.
_______
The area relevant to CS0 ranges from 4000016 through FFFFF16. As for the area from 4000016 through
_______
BFFFF16, the bank number set by use of the bank selection bits are output from the output terminals CS3
_______
- CS1 only in accessing data. In fetching a program, bank 7 (1112) is output from CS3 - CS1. As for the
_______
area from C000016 through FFFFF16, bank 7 (1112) is output from CS3 - CS1 without regard to accessing
data or to fetching a program.
_______
In accessing an area irrelevant to CS0, a chip select signal CS3 (400016 - 7FFF16), CS2 (800016 -
_______
27FFF16), and CS1 (2800016 - 3FFFF16) is output depending on the address as in the past.
Figure 1.8.6 shows an example of connecting the MCU with a 4-M byte ROM and to a 128-K byte SRAM.
_______
Connect the chip select of 4-M byte ROM with CS0. Connect M16C’s CS3, CS2, and CS1 with address
inputs AD21, AD20, and A19 respectively. Connect M16C’s output AD19 with address input AD18. Fig-
ure 1.8.7 shows the relationship between addresses of the 4-M byte ROM and those of M16C.
An example of connecting the MCU with
external memories in expansion mode 2
(M30622MC, Microprocessor mode)
17
8
M30622MCT-XXXFP
D0 to D7
A0 to A16
A17
RD
WR
CS1
CS2
CS3
CS0
A19
4-M
byte
ROM
DQ0 to DQ7
AD0 to AD16
AD17
AD18
AD19
OE
CS
128-K
byte
SRAM
DQ0 to DQ7
AD0 to AD16
S2
W
OE
S1
AD20
AD21
Note 1. If only one chip select terminal (S1 or S2) is present,
decoding by use of an external circuit is required.
Note 2. M30623(80-pin package) is not provided with the
output pin for the chip select signal.
Note 3. The M16C/62T group is not guaranteed to operate
in memory expansion and microprocessor modes.
In this mode, memory is banked
every 512 K bytes, so that data
access in different banks requires
switching over banks. However,
data on bank boundaries when
offset bit = 0 can be accessed
successively by setting the offset
bit to 1, because in which case
the memory address is offset by
4000016. For example, two bytes
of data located at addresses
0FFFFF16 and 10000016 of 4-
Mbyte ROM can be accessed
successively without having to
change the bank bit by setting the
offset bit to 1 and then accessing
addresses 07FFFF 16 and
80000016.
On the other hand, the SRAM’s
_______
chip select assumes that CS0=1
_______
(not selected) and CS2=0 (se-
_______
lected), so connect CS0 with S2
_______
____
and CS2 with S1. If the SRAM
doesn’t have a bipolar chip select
_______
input terminal, decode CS0 and
_______
CS2 externally.
Figure 1.8.6. An example of connecting the MCU with
external memories in expansion mode 2
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