參數(shù)資料
型號: M3062AFCVGP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù): 62/104頁
文件大小: 1313K
代理商: M3062AFCVGP
5. Electrical Characteristics
Rev.2.41
Jan 10, 2006
Page 58 of 96
REJ03B0001-0241
Figure 5.5
Timing Diagram (3)
Memory Expansion Mode, Microprocessor Mode
(Effective for setting with wait)
BCLK
HOLD input
HLDA input
Measuring conditions :
VCC1=VCC2=5V
Input timing voltage : Determined with VIL=1.0V, VIH=4.0V
Output timing voltage : Determined with VOL=2.5V, VOH=2.5V
P0, P1, P2,
P3, P4,
P5_0 to P5_2
(1)
(Common to setting with wait and setting without wait)
NOTES:
1. These pins are set to high-impedance regardless of the input level of the
BYTE pin, PM06 bit in PM0 register and PM11 bit in PM1 register.
th(BCLKHOLD)
tsu(HOLDBCLK)
td(BCLKHLDA)
HiZ
RDY input
tsu(RDYBCLK)
th(BCLKRDY)
RD
BCLK
(Separate bus)
(Multiplexed bus)
WR, WRL, WRH
RD
(Separate bus)
WR, WRL, WRH
(Multiplexed bus)
VCC1=VCC2=5V
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