參數(shù)資料
型號(hào): M3062EMAT-XXXGP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP80
封裝: 14 X 14 MM, 0.65 MM PITCH, PLASTIC, QFP-80
文件頁(yè)數(shù): 97/103頁(yè)
文件大?。?/td> 1106K
代理商: M3062EMAT-XXXGP
5. Electrical Characteristics
Rev.2.41
Jan 10, 2006
Page 91 of 96
REJ03B0001-0241
VCC1=VCC2=5V
Timing Requirements
(VCC1 = VCC2 = 5V, VSS = 0V, at Topr =
40 to 85°C (T version) / 40 to 125°C (V version) unless otherwise
specified)
Table 5.66
Timer B Input (Counter Input in Event Counter Mode)
Symbol
Parameter
Standard
Unit
Min.
Max.
tc(TB)
TBiIN Input Cycle Time (counted on one edge)
100
ns
tw(TBH)
TBiIN Input HIGH Pulse Width (counted on one edge)
40
ns
tw(TBL)
TBiIN Input LOW Pulse Width (counted on one edge)
40
ns
tc(TB)
TBiIN Input Cycle Time (counted on both edges)
200
ns
tw(TBH)
TBiIN Input HIGH Pulse Width (counted on both edges)
80
ns
tw(TBL)
TBiIN Input LOW Pulse Width (counted on both edges)
80
ns
Table 5.67
Timer B Input (Pulse Period Measurement Mode)
Symbol
Parameter
Standard
Unit
Min.
Max.
tc(TB)
TBiIN Input Cycle Time
400
ns
tw(TBH)
TBiIN Input HIGH Pulse Width
200
ns
tw(TBL)
TBiIN Input LOW Pulse Width
200
ns
Table 5.68
Timer B Input (Pulse Width Measurement Mode)
Symbol
Parameter
Standard
Unit
Min.
Max.
tc(TB)
TBiIN Input Cycle Time
400
ns
tw(TBH)
TBiIN Input HIGH Pulse Width
200
ns
tw(TBL)
TBiIN Input LOW Pulse Width
200
ns
Table 5.69
A/D Trigger Input
Symbol
Parameter
Standard
Unit
Min.
Max.
tc(AD)
ADTRG Input Cycle Time
1000
ns
tw(ADL)
ADTRG input LOW Pulse Width
125
ns
Table 5.70
Serial Interface
Symbol
Parameter
Standard
Unit
Min.
Max.
tc(CK)
CLKi Input Cycle Time
200
ns
tw(CKH)
CLKi Input HIGH Pulse Width
100
ns
tw(CKL)
CLKi Input LOW Pulse Width
100
ns
td(C-Q)
TXDi Output Delay Time
80
ns
th(C-Q)
TXDi Hold Time
0
ns
tsu(D-C)
RXDi Input Setup Time
70
ns
th(C-D)
RXDi Input Hold Time
90
ns
Table 5.71
External Interrupt INTi Input
Symbol
Parameter
Standard
Unit
Min.
Max.
tw(INH)
INTi Input HIGH Pulse Width
250
ns
tw(INL)
INTi Input LOW Pulse Width
250
ns
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