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參數(shù)資料
| 型號： | M306NAMCV-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100 |
| 文件頁數(shù)： | 19/295頁 |
| 文件大?。?/td> | 3365K |
| 代理商： | M306NAMCV-XXXFP |
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Timer's Functions for Three-Phase Motor Control
Mitsubishi microcomputers
M16C / 6N0 / 6N1 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
114
Sawtooth Modulation
To generate a PWM waveform of sawtooth wave modulation, set "1" in the modulation mode select bit
(bit 6 at address 01C816). Also, set "0" in the timers A1-1, A2-1, A4-1 control bit (bit 1 at address
01C916). In this mode, the timer registers of timers A4, A1, and of A2 comprise conventional timers A4,
A1, and A2 alone, and reload the corresponding timer register's content to the counter every time the
timer B2 counter's content becomes 000016. The effective interrupt output specification bit (bit 1 at
address 01C816) and the effective interrupt output polarity selection bit (bit 0 at address 01C816) turn
nullified.
An example of U phase waveform is shown in Figure 1.15.8, and the description of waveform output
workings is given below. Set "1" in DU0 bit (bit 0 at address 01CA16) and set "0" in DUB0 bit (bit 1 at
address 01CA16). In addition, set "0" in DU1 bit (bit 0 at address 01CA16) and set "1" in DUB1 bit (bit 1
at address 01CA16).
When the timer B2 counter's content becomes 000016, timer B2 generates an interrupt, and timer A4
starts outputting one-shot pulses at the same time. In this instance, the contents of the three-phase
buffer registers DU1 bit and DU0 bit are set in the three-phase output shift register (U phase), and the
contents of DUB1 bit and DUB0 bit are set in the three-phase output register (U phase). After this, the
three-phase buffer register's content is set in the three-phase shift register every time the timer B2
counter's content becomes 000016.
__
The value of DU0 bit and that of DUB0 bit are output to the U terminal (P80) and to the U terminal (P81)
respectively. When the timer A4 counter counts the value written to timer A4 (addresses 038F16 and
038E16) and when timer A4 finishes outputting one-shot pulses, the three-phase output shift register's
content is shifted one position, and the value of DU1 bit and that of DUB1 bit are output to the U phase
__
output signal and to the U output signal respectively. At the this time, one-shot pulses are output from
the timer for setting dead time used for setting the time over which the "L" level of the U phase waveform
__
doesn't lap over the "L" level of the U phase waveform, which has the opposite phase of the former. The
U phase waveform output that started from the "H" level keeps its level until the timer for setting dead
time finishes outputting one-shot pulses even though the three-phase output shift register's content
changes from "1" to "0" by the effect of the one-shot pulses. When the timer for setting dead time
finishes outputting one-shot pulses, 0 already shifted in the three-phase shift register goes effective, and
the U phase waveform changes to the "L" level. When the timer B2 counter's content becomes 000016,
the contents of the three-phase buffer registers DU1 bit and DU0 bit are set in the three-phase shift
__
register (U phase), and the contents of DUB1 bit and DUB0 bit are set in the three-phase shift register (U
phase) again.
A U phase waveform is generated by these workings repeatedly. With the exception that the three-
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phase output shift register on the U phase side is used, the workings in generating a U phase waveform,
which has the opposite phase of the U phase waveform, are the same as in generating a U phase
waveform. In this way, a waveform can be picked up from the applicable terminal in a manner in which
__
the "L" level of the U phase waveform doesn't lap over that of the U phase waveform, which has the
opposite phase of the U phase waveform. The width of the "L" level too can be adjusted by varying the
__
___
values of timer B2 and timer A4. In dealing with the V and W phases, and V and W phases, the latter are
of opposite phase of the former, have the corresponding timers work similarly to dealing with the U and
__
U phases to generate an intended waveform.
Setting "1" both in DUB0 bit and DUB1 bit provides a means to output the U phase alone and to fix the
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U phase output to "H" as shown in Figure 1.15.9.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| M306NKFHGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas MCU |
| M306NKFHGP#U3 | 功能描述:IC M16C MCU FLASH 384K 100LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:M16C™ M16C/60/6NK 標(biāo)準(zhǔn)包裝:1 系列:AVR® ATmega 核心處理器:AVR 芯體尺寸:8-位 速度:16MHz 連通性:I²C，SPI，UART/USART 外圍設(shè)備:欠壓檢測/復(fù)位，POR，PWM，WDT 輸入/輸出數(shù):32 程序存儲器容量:32KB（16K x 16） 程序存儲器類型:閃存 EEPROM 大小:1K x 8 RAM 容量:2K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:44-TQFP 包裝:剪切帶 (CT) 其它名稱:ATMEGA324P-B15AZCT |
| M306NKFHTGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas MCU |
| M306NKFHVGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas MCU |
| M306NKFJGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas MCU |
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