Mitsubishi microcomputers
M16C / 6N0 / 6N1 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
126
Note 1: "n" denotes the value 0016 to FF16 that is set to the UART bit rate generator.
Note 2: If an overrun error occurs, the UARTi receive buffer will have the next data written in. Note also that
the UARTi receive interrupt request bit is not set to "1".
Clock Synchronous Serial I/O Mode
(1) Clock synchronous serial I/O mode
The clock synchronous serial I/O mode uses a transfer clock to transmit and receive data. Tables 1.16.2
and 1.16.3 list the specifications of the clock synchronous serial I/O mode. Figure 1.16.9 shows the
UARTi transmit/receive mode register.
Interrupt request
generation timing
Item
Specification
Transfer data format
Transfer clock
When internal clock is selected (bit 3 at addresses 03A016, 03A816, 01F816
= "0") : fjSIO2/ 2(n+1)(Note 1)
j = 2, 8, 32
When external clock is selected (bit 3 at addresses 03A016, 03A816, 01F816
= "1") : Input from CLKi pin
Transmission/reception
control
CTS function/RTS function/CTS, RTS function chosen to be invalid
Transmission start
condition
To start transmission, the following requirements must be met:
_ Transmit enable bit (bit 0 at addresses 03A516, 03AD16, 01FD16) = "1"
_ Transmit buffer empty flag (bit 1 at addresses 03A516, 03AD16, 01FD16) = "0"
_ When CTS function selected, CTS input level = "L"
Furthermore, if external clock is selected, the following requirements must also be met:
_
CLKi polarity select bit (bit 6 at addresses 03A416, 03AC16, 01FC16) = "0":
CLKi input level = "H"
_ CLKi polarity select bit (bit 6 at addresses 03A416, 03AC16, 01FC16) = "1":
CLKi input level = "L"
Reception start condition
_ Receive enable bit (bit 2 at addresses 03A516, 03AD16, 01FD16) = "1"
_ Transmit enable bit (bit 0 at addresses 03A516, 03AD16, 01FD16) = "1"
_ Transmit buffer empty flag (bit 1 at addresses 03A516, 03AD16, 01FD16) = "0"
Furthermore, if external clock is selected, the following requirements must
also be met:
_ CLKi polarity select bit (bit 6 at addresses 03A416, 03AC16, 01FC16) = "0":
CLKi input level = "H"
_ CLKi polarity select bit (bit 6 at addresses 03A416, 03AC16, 01FC16) = "1":
CLKi input level = "L"
When transmitting
_ Transmit interrupt cause select bit (bits 0, 1 at address 03B016, bit 4 at
address 01FD16) = "0": Interrupts requested when data transfer from UARTi
transfer buffer register to UARTi transmit register is completed
_ Transmit interrupt cause select bit (bits 0, 1 at address 03B016, bit 4 at
address 01FD16) = "1": Interrupts requested when data transmission from
UARTi transfer register is completed
When receiving
_ Interrupts requested when data transfer from UARTi receive register to
UARTi receive buffer register is completed
Overrun error (Note 2)
Transfer data length: 8 bits
To start reception, the following requirements must be met:
Error detection
This error occurs when the next data is ready before contents of UARTi
receive buffer register are read out
Table 1.16.2. Specifications of clock synchronous serial I/O mode (1)