Timer's Functions for Three-Phase Motor Control
Mitsubishi microcomputers
M16C / 6N0 / 6N1 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
105
Figure 1.15.1. Registers related to timers for three-phase motor control
Three-phase PWM control register 0
Symbol
Address
When reset
INVC0
01C816
0016
b7
b6
b5
b4
b3
b2
b1
b0
Effective interrupt output
polarity select bit
INV00
Bit symbol
Bit name
Description
RW
INV01
Effective interrupt output
specification bit
(Note 4)
INV02
Mode select bit
(Note 2)
INV04
INV07
Software trigger bit
INV06
Modulation mode select
bit (Note 3)
INV05
INV03
Output control bit
0: A timer B2 interrupt occurs when the timer
A1 reload control signal is "1".
1: A timer B2 interrupt occurs when the timer
A1 reload control signal is "0".
Effective only in three-phase mode 1
0: Not specified.
1: Selected by the effective interrupt output
polarity selection bit.
Effective only in three-phase mode 1
0: Normal mode
1: Three-phase PWM output mode
0: Output disabled
1: Output enabled
0: Feature disabled
1: Feature enabled
0: Not detected yet
1: Already detected
0: Triangular wave modulation mode
1: Sawtooth wave modulation mode
1: Trigger generated
The value, when read, is "0".
(Note 1)
T
hree-phase PWM control register 1
Symbol
Address
When reset
INVC1
01C916
0016
Bit name
Description
Bit symbol
W
R
INV10
INV11
INV12
Timer Ai start trigger
signal select bit
Timer A1-1, A2-1, A4-1
control bit
Short circuit timer count
source select bit
0: Timer B2 overflow signal
1: Timer B2 overflow signal,
signal for writing to timer B2
0: Three-phase mode 0
1: Three-phase mode 1
0 : inhibited
1 : f2/2 (Note)
b7
b6
b5
b4
b3
b2
b1
b0
Noting is assigned.
These bits can be set nor reset. When read, their contents are indeterminate.
Reserved bit
Always set to "0"
0
Note: To use three-phase PWM output mode, write "1" to INV12.
In an attempt to write to these bits, write "0". The value, if read, turns out to be "0".
Positive and negative
phases concurrent L
output disable function
enable bit
Positive and negative
phases concurrent L
output detect flag
Note 1: No value other than "0" can be written.
Note 2: Selecting three-phase PWM output mode causes P80, P81, and P72 through P75 to output U, U, V, V, W, and W, and
works the timer for setting short circuit prevention time, the U, V, W phase output control circuits, and the circuit for
setting timer B2 interrupt frequency.
Note 3: In triangular wave modulation mode:
The short circuit prevention timer starts in synchronization with the falling edge of timer Ai output.
The data transfer from the three-phase buffer register to the three-phase output shift register is made only once in
synchronization with the transfer trigger signal after writing to the three-phase output buffer register.
In sawtooth wave modulation mode:
The short circuit prevention timer starts in synchronization with the falling edge of timer A output and with the transfer
trigger signal. The data transfer from the three-phase output buffer register to the three-phase output shift register
is made with respect to every transfer trigger.
Note 4:To write "1" to bit 1 (INV01) of the three-phase PWM control register 0, set in advance the contentof the timer B2
interrupt occurrences frequency set counter.
Timer's Functions for Three-Phase Motor Control
Use of more than one built-in timer A and timer B provides the means of outputting three-phase motor
driving waveforms.
Figures 1.15.1 through 1.15.3 show registers related to timers for three-phase motor control.