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| 型號(hào)： | M306NNFHGP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP128 |
| 封裝： | 14 X 20 MM, 0.50 MM PITCH, PLASTIC, LQFP-128 |
| 文件頁(yè)數(shù)： | 40/72頁(yè) |
| 文件大?。?/td> | 649K |
| 代理商： | M306NNFHGP |
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Rev.2.10
Aug 25, 2006
page 43 of 67
REJ03B0061-0210
M16C/6N Group (M16C/6NL, M16C/6NN)
5. Electric Characteristics
Under development
This document is under development and its contents are subject to change.
4
(NOTE 1)
4
(NOTE 1)
0
4
(NOTE 2)
(NOTE 1)
–4
(NOTE 3)
(NOTE 4)
0
td(BCLK-AD)
th(BCLK-AD)
th(RD-AD)
th(WR-AD)
td(BCLK-CS)
th(BCLK-CS)
th(RD-CS)
th(WR-CS)
td(BCLK-RD)
th(BCLK-RD)
td(BCLK-WR)
th(BCLK-WR)
td(BCLK-DB)
th(BCLK-DB)
td(DB-WR)
th(WR-DB)
td(BCLK-HLDA)
td(BCLK-ALE)
th(BCLK-ALE)
td(AD-ALE)
th(ALE-AD)
td(AD-RD)
td(AD-WR)
tdZ(RD-AD)
ns
Address output delay time
Address output hold time (in relation to BCLK)
Address output hold time (in relation to RD)
Address output hold time (in relation to WR)
Chip select output delay time
Chip select output hold time (in relation to BCLK)
Chip select output hold time (in relation to RD)
Chip select output hold time (in relation to WR)
RD signal output delay time
RD signal output hold time
WR signal output delay time
WR signal output hold time
Data output delay time (in relation to BCLK)
Data output hold time (in relation to BCLK)
Data output delay time (in relation to WR)
Data output hold time (in relation to WR)
__________
HLDA output delay time
ALE signal output delay time (in relation to BCLK)
ALE signal output hold time (in relation to BCLK)
ALE signal output delay time (in relation to Address)
ALE signal output hold time (in relation to Address)
RD signal output delay from the end of Address
WR signal output delay from the end of Address
Address output floating start time
Symbol
Parameter
Min.
Standard
Unit
Max.
Switching Characteristics
(Referenced to VCC = 5 V, VSS = 0 V, at Topr = –40 to 85 °C unless otherwise specified)
Table 5.27 Memory Expansion Mode and Microprocessor Mode
(for 2- to 3-wait setting, external area access and multiplexed bus selection)
25
40
15
8
Measuring
Condition
Figure 5.2
NOTES:
1. Calculated according to the BCLK frequency as follows:
0.5
109
f(BCLK)
– 10 [ns]
2. Calculated according to the BCLK frequency as follows:
(n –0.5)
109
f(BCLK)
– 40 [ns]
n is “2” for 2-wait setting, “3” for 3-wait setting.
3. Calculated according to the BCLK frequency as follows:
0.5
109
f(BCLK)
– 25 [ns]
4. Calculated according to the BCLK frequency as follows:
0.5
109
f(BCLK)
– 15 [ns]
VCC = 5 V
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相關(guān)代理商/技術(shù)參數(shù) |
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| M306NNFHGP#U3 | 功能描述:IC M16C MCU FLASH 384K 128LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:M16C™ M16C/6N 產(chǎn)品培訓(xùn)模塊:Graphics LCD System and PIC24 Interface Asynchronous Stimulus 標(biāo)準(zhǔn)包裝:27 系列:PIC® 24H 核心處理器:PIC 芯體尺寸:16-位 速度:40 MIP 連通性:I²C，SPI，UART/USART 外圍設(shè)備:欠壓檢測(cè)/復(fù)位，POR，PWM，WDT 輸入/輸出數(shù):21 程序存儲(chǔ)器容量:12KB（4K x 24） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):3 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 10x10b/12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 包裝:管件 產(chǎn)品目錄頁(yè)面:648 (CN2011-ZH PDF) 配用:AC164339-ND - MODULE SKT FOR PM3 28SOICDV164033-ND - KIT START EXPLORER 16 MPLAB ICD2 |
| M306NNFJGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas MCU |
| M306NNFJGP#U3 | 功能描述:IC M16C/6NN MCU FLASH 100LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:M16C™ M16C/6N 標(biāo)準(zhǔn)包裝:160 系列:S08 核心處理器:S08 芯體尺寸:8-位 速度:40MHz 連通性:I²C，LIN，SCI，SPI 外圍設(shè)備:LCD，LVD，POR，PWM，WDT 輸入/輸出數(shù):53 程序存儲(chǔ)器容量:32KB（32K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:1.9K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 12x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 105°C 封裝/外殼:64-LQFP 包裝:托盤 |
| M306NNME-XXXGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas MCU |
| M306NNMG-XXXGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas MCU |
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