deveopmen
UARTi Special Mode Register
Preliminary Specifications REV.D
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M16C/80 (100-pin version) group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
151
UARTi Special Mode Register (i = 2 to 4)
UART2 to UART4 operate the IIC bus interface (simple IIC bus) using the UARTi special mode register
(addresses 0337
16
, 0327
16
and 02F7
16
[i = 2 to 4]) and UARTi special mode register 2 (addresses
0336
16
, 0326
16
and 02F6
16
[i = 2 to 4]). UART3 and UART4 add special functions using UARTi special
mode resister 3 (addresses 0325
16
and 02F5
16
[i = 3 or 4]).
(1) IIC Bus Interface Mode
The IIC bus interface mode is provided with UART2 to UART4.
Table 1.20.1 shows the construction of the UARTi special mode register and UARTi special mode regis-
ter 2.
When the IC mode select bit (bit 0 in addresses 0337
16
, 0327
16
and 02F7
16
) is set to “1”, the I
2
C bus
(simple I
2
C bus) interface circuit is enabled. Table 1.20.1 shows the relationship of the IIC mode select bit
to control. To use the chip in the clock synchronized serial I/O mode or clock asynchronized serial I/O
mode, always set this bit to “0”.
Function
Normal mode
I
2
C mode (Note 1)
Factor of interrupt number 33, 35, 37 (Note 2)
UARTi transmission
No acknowledgment detection (NACK)
Factor of interrupt number 34, 36, 38 (Note 2)
UARTi reception
Start condition detection or stop
condition detection
UARTi transmission output delay
Not delayed
Delayed
P7
0
, P9
2
, P9
6
at the time when UARTi is in use
TxD
i
(output)
SDAi (input/output) (Note 3)
P7
1
, P9
1
, P9
7
at the time when UARTi is in use
RxD
i
(input)
SCLi (input/output)
P7
2
, P9
0
, P9
5
at the time when UARTi is in use
CLKi
P7
2
, P9
0
, P9
5
DMA1 factor at the time when 1 1 0 1 is assigned
to the DMA request factor selection bits
UARTi reception
Acknowledgment detection (ACK)
Noise filter width
15ns
Reading the terminal when 0 is
assigned to the direction register
50ns
Reading the terminal regardless of the
value of the direction register
Reading P7
1
, P9
1
, P9
7
1
2
3
4
5
6
7
8
9
Note 1: Make the settings given below when I
2
C mode is in use.
Set 0 1 0 in bits 2, 1, 0 of the UARTi transmission/reception mode register.
Disable the RTS/CTS function. Choose the MSB First function.
Note 2: Follow the steps given below to switch from a factor to another.
1. Disable the interrupt of the corresponding number.
2. Switch from a factor to another.
3. Reset the interrupt request flag of the corresponding number.
4. Set an interrupt level of the corresponding number.
Note 3: Set an initial value of SDA transmission output when IIC mode (IIC mode select bit = "1") is valid and serial I/O is invalid.
Factor of interrupt number 39 to 41 (Note 2)
Bus collision detection
Acknowledgment detection (ACK)
10
Initial value of UARTi output
H level (when 0 is assigned to
the CLK polarity select bit)
The value set in latch P7
0
, P9
2
, P9
6
when the port is selected (Note 3)
11
Table 1.20.1. Features in I
2
C mode