Under
development
Preliminary Specifications REV.D
Specifications in this manual are tentative and subject to change.
Mitsubishi Microcomputers
M16C/80 group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Watchdog Timer
79
Watchdog timer control register
Symbol
Address
When reset
WDC
000F16
000XXXXX2
Function
Bit symbol
W
R
b7
b6
b5
b4
b3
b2
b1
b0
High-order bit of watchdog timer
WDC7
Bit name
Prescaler select bit
0 : Divided by 16
1 : Divided by 128
Watchdog timer start register
Symbol
Address
When reset
WDTS
000E16
Indeterminate
W
R
b7
b0
Function
The watchdog timer is initialized and starts counting after a write instruction to
this register. The watchdog timer value is always initialized to “7FFF16”
regardless of whatever value is written.
Reserved bit
Must always be set to “0”
0
Figure 1.10.2. Watchdog timer control and start registers
System clock control register 0 (Note 1)
Symbol
Address
When reset
CM0
000616
0816
Bit
name
Function
Bit symbol
b7
b6
b5
b4
b3 b2
b1
b0
0 0 : I/O port P53
0 1 : fC output (Note 3)
1 0 : f8 output (Note 3)
1 1 : f32 output (Note 3)
b1 b0
CM07
CM05
CM04
CM03
CM01
CM02
CM00
Clock output function
select bit (Note 2)
WAIT peripheral function
clock stop bit
0 : Do not stop peripheral clock in wait
mode
1 : Stop peripheral clock in wait mode
(Note 10)
XCIN-XCOUT drive capacity
select bit (Note 4)
0 : LOW
1 : HIGH
Port XC select bit
0 : I/O port
1 : XCIN-XCOUT generation (Note 11)
Main clock (XIN-XOUT)
stop bit (Note 5, 6)
0 : On
1 : Off (Note 7)
System clock select bit
(Note 9)
0 : XIN, XOUT
1 : XCIN, XCOUT
Note 1: Set bit 0 of the protect register (address 000A16) to “1” before writing to this register.
Note 2: When outputting BCLK (bit 7 of processor mode register 0 is "0"), set these bits to "00". When
outputting ALE to P53 (bit 5 and 4 of processor mode register 0 is "01"), set these bits to "00". The
port P53 function is not selected even when you set "00" in microprocessor or memory expansion
mode and bit 7 of the processor mode register 0 is "1".
Note 3: When selecting fC, f8 or f32 in single chip mode, must use P57 as input port.
Note 4: Changes to “1” when shifting to stop mode or reset.
Note 5: When entering the power saving mode, the main clock is stopped using this bit. To stop the main
clock, set system clock stop bit (CM07) to "1" while an oscillation of sub clock is stable. Then set this
bit to "1".
Note 6: When this bit is "1", XOUT is "H". Also, the internal feedback resistance remains ON, so XIN is pulled
up to XOUT ("H" level) via the feedback resistance.
Note 7: When the main clock is stopped, the main clock division register (address 000C16) is set to the
division by 8 mode.
Note 8: When "1" has been set once, "0" cannot be written by software.
Note 9: To set CM07 "1" from "0", first set CM04 to "1", and an oscillation of sub clock is stable. Then set
CM07. Do not set CM04 and CM07 simultaneously. Also, to set CM07 "0" from "1", first set CM05
to "1", and an oscillation of main clock is stable. Then set CM07.
Note 10: fc32 is not included.
Note 11: When XcIN-XcOUT is used, set port P86 and P87 to no pull-up resistance with the input port.
W
R
CM06
Watchdog timer function
select bit
0 : Watchdog timer interrupt
1 : Reset (Note 8)