參數(shù)資料
型號： M30L0R7000B0ZAQT
廠商： 意法半導(dǎo)體
英文描述： CAP 0.047UF 100V 20% X7R DIP-2 BULK R-MIL-C-39014
中文描述： 128兆位（8兆x16插槽，多銀行，多層次，多突發(fā)），1.8V電源快閃記憶體
文件頁數(shù)： 64/83頁
文件大?。?/td> 1329K
代理商： M30L0R7000B0ZAQT
M30L0R7000T0, M30L0R7000B0
64/83
Table 35. Primary Algorithm-Specific Extended Query Table
Offset
Data
Description
Value
(P)h = 10Ah
0050h
Primary Algorithm extended Query table unique ASCII string “PRI”
"P"
0052h
"R"
0049h
"I"
(P+3)h = 10Dh
0031h
Major version number, ASCII
"1"
(P+4)h = 10Eh
0033h
Minor version number, ASCII
"3"
(P+5)h = 10Fh
00E6h
Extended Query table contents for Primary Algorithm. Address (P+5)h
contains less significant byte.
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
bit 8
bit 9
bit 10 to 31Reserved; undefined bits are ‘0’. If bit 31 is ’1’ then another 31
bit field of optional features follows at the end of the bit-30
field.
Chip Erase supported
Erase Suspend supported
Program Suspend supported
Legacy Lock/Unlock supported
Queued Erase supported
Instant individual block locking supported (1 = Yes, 0 = No)
Protection bits supported
Page mode read supported
Synchronous read supported
Simultaneous operation supported
(1 = Yes, 0 = No)
(1 = Yes, 0 = No)
(1 = Yes, 0 = No)
(1 = Yes, 0 = No)
(1 = Yes, 0 = No)
(1 = Yes, 0 = No)
(1 = Yes, 0 = No)
(1 = Yes, 0 = No)
(1 = Yes, 0 = No)
No
Yes
Yes
No
No
Yes
Yes
Yes
Yes
Yes
0003h
(P+7)h = 111h
0000h
(P+8)h = 112h
0000h
(P+9)h = 113h
0001h
Supported Functions after Suspend
Read Array, Read Status Register and CFI Query
bit 0
bit 7 to 1
Program supported after Erase Suspend (1 = Yes, 0 = No)
Reserved; undefined bits are ‘0’
Yes
(P+A)h = 114h
0003h
Block Protect Status
Defines which bits in the Block Status Register section of the Query are
implemented.
bit 0
Block protect Status Register Lock/Unlock
bit active
Block Lock Status Register Lock-Down bit active (1 = Yes, 0 = No)
bit 15 to 2 Reserved for future use; undefined bits are ‘0’
(1 = Yes, 0 = No)
bit 1
Yes
Yes
(P+B)h = 115h
0000h
(P+C)h = 116h
0018h
V
DD
Logic Supply Optimum Program/Erase voltage (highest performance)
bit 7 to 4
bit 3 to 0
HEX value in volts
BCD value in 100 mV
1.8V
(P+D)h = 117h
0090h
V
PP
Supply Optimum Program/Erase voltage
bit 7 to 4
bit 3 to 0
HEX value in volts
BCD value in 100 mV
9V
相關(guān)PDF資料
PDF描述
M30L0R8000T0ZAQ 256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M30L0R7000T0 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory
M30L0R7000T0ZAQ 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory
M30L0R7000T0ZAQE 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory
M30L0R7000T0ZAQF 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory
M30L0R7000T0ZAQT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory
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