17
17-7
Ver.0.10
RAM BACKUP MODE
17.3 Example of RAM Backup for Saving Power Consumption
Figure 17.3.3 RAM Backup State for Low-Power Operation
Note 1:
This signal outputs a low for RAM backup.
Note 2:
This pin outputs a high when the power is on, and
is set for input mode when in RAM backup mode.
Note 3:
These pins are used to detect a RAM backup
signal.
Note 4:
Determined by the input voltage level on SBI pin
or ADnINi pin.
Note 5:
Base voltage IB = 0 causes the current fed to the
VCC pin to stop. Explained in A to D above.
17.3.2 RAM Backup State
Figure 17.3.3 shows the RAM backup state of the M32R/E. Figure 17.3.4 shows a RAM backup
sequence. When the external circuit outputs a low, input on the SBI pin or ADnINi pin goes low. A
low on these input pins generates a RAM backup signal (A and
in Figure 17.3.3). To enable RAM
backup mode, make the following settings.
(1) Create check data to verify after returning from RAM backup to normal mode whether the
RAM data has been retained normally (
in Figure 17.3.3).
(2) To materialize low-power operation, set all programmable input/output pins except port X for
input mode (or for output mode, with pins outputting a low) (
in Figure 17.3.3).
(3) Set port X for input mode (B and
in Figure 17.3.3). This causes the transistor's base
voltage, IB, to go low, so that no current flows from the power supply to the VCC pin via the
transistor (C in Figure 17.3.3). Consequently, the power to the VCC pin is shut off (D in Figure
17.3.3).
Due to settings in (1) to (3), the voltage applied to the VDD pin becomes 3.3 V
±
10% and voltages
applied to all other pins drop to 0 V, thus placing the M32R/E in RAM backup mode (
in Figure 17.2.3).
RAM backup
signal (Note 1)
External circuit
Port X
(Note 2)
IB
Power supply for RAM
DC IN
Input
Output
Regulator
(3.3V system)
Output
Regulator
(5V system)
Output
Regulator
(3.3V system)
VREFn
SBI
ADnINi
M32R/E
VDD
VCCI
AVCCn
OSC-VCC VCCE
(Note 3)
3.3V
"L"
"L"
"L"
D
C
"L"
"L"
B
A
0V
0V
0V
0V
0V
Example of RAM
backup processing
Generate RAM backup signal
(Note 4)
Create check data
for backup RAM
RAM backup mode
Set transistor's base
connecting pin (port X) for
input mode (Note 5)