MITSUBISHI
ELECTRIC
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
57
MITSUBISHI MICROCOMPUTERS
4282 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
REGISTER STRUCTURE
V1
2
V1
1
V1
0
Timer control register V1
Auto-control output by timer 1 is invalid
Auto-control output by timer 1 is valid
Carrier wave output (CARRY)
Bit 5 of watchdog timer (WDT)
Stop (Timer 1 state retained)
Operating
0
1
0
1
0
1
Carrier wave output auto-control bit
Timer 1 count source selection bit
Timer 1 control bit
at reset : 000
2
W
at RAM back-up : 000
2
V1
3
V1
2
V1
1
V1
0
Timer control register V1
To expand “H” interval is invalid
To expand “H” interval is valid (when V2
2
=1 selected)
Carrier wave generation function invalid
Carrier wave generation function valid
f(X
IN
)
f(X
IN
)/2
Stop (Timer 2 state retained)
Operating
0
1
0
1
0
1
0
1
Carrier wave “H” interval expansion bit
Carrier wave generation function control bit
Timer 2 count source selection bit
Timer 2 control bit
at reset : 0000
2
W
at RAM back-up : 0000
2
at reset : 00
2
at RAM back-up : 00
2
W
L
O
1
0
0
1
1
L
O
0
0
1
0
1
LO
1
LO
0
Logic operation selection bits
Logic operation selection register LO
Logic operation function
Exclusive logic OR operation (XOR)
OR operation (OR)
AND operation (AND)
Not available
PU0
3
PU0
2
PU0
1
PU0
0
Pull-down transistor OFF, key-on wakeup invalid
Pull-down transistor ON, key-on wakeup valid
Pull-down transistor OFF, key-on wakeup invalid
Pull-down transistor ON, key-on wakeup valid
Pull-down transistor OFF, key-on wakeup invalid
Pull-down transistor ON, key-on wakeup valid
Pull-down transistor OFF, key-on wakeup invalid
Pull-down transistor ON, key-on wakeup valid
Ports G
2
, G
3
pull-down transistor control
bit
Ports G
0
, G
1
pull-down transistor control
bit
Port E
1
pull-down transistor control bit
Port E
0
pull-down transistor control bit
Pull-down control register PU0
at reset : 0000
2
at RAM back-up : state retained
W
0
1
0
1
0
1
0
1
PU1
3
PU1
2
PU1
1
PU1
0
Pull-down transistor OFF, key-on wakeup invalid
Pull-down transistor ON, key-on wakeup valid
Pull-down transistor OFF, key-on wakeup invalid
Pull-down transistor ON, key-on wakeup valid
Pull-down transistor OFF, key-on wakeup invalid
Pull-down transistor ON, key-on wakeup valid
Pull-down transistor OFF, key-on wakeup invalid
Pull-down transistor ON, key-on wakeup valid
Port D
7
pull-down transistor control bit
Port D
6
pull-down transistor control bit
Port D
5
pull-down transistor control bit
Port D
4
pull-down transistor control bit
Pull-down control register PU1
at reset : 0000
2
at RAM back-up : state retained
W
0
1
0
1
0
1
0
1