參數(shù)資料
型號： M34513E4SP
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
中文描述： 單芯片4位微機的CMOS
文件頁數(shù)： 16/106頁
文件大小： 1304K
代理商： M34513E4SP
16
4513/4514 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
change.
Some parametric limits are subject to
(5) Stack registers (SK
S
) and stack pointer (SP)
Stack registers (SKs) are used to temporarily store the contents of
program counter (PC) just before branching until returning to the
original routine when;
branching to an interrupt service routine (referred to as an inter-
rupt service routine),
performing a subroutine call, or
executing the table reference instruction (TABP p).
Stack registers (SKs) are eight identical registers, so that subrou-
tines can be nested up to 8 levels. However, one of stack registers
is used respectively when using an interrupt service routine and
when executing a table reference instruction. Accordingly, be care-
ful not to over the stack when performing these operations
together. The contents of registers SKs are destroyed when 8 lev-
els are exceeded.
The register SK nesting level is pointed automatically by 3-bit
stack pointer (SP). The contents of the stack pointer (SP) can be
transferred to register A with the TASP instruction.
Figure 5 shows the stack registers (SKs) structure.
Figure 6 shows the example of operation at subroutine call.
(6) Interrupt stack register (SDP)
Interrupt stack register (SDP) is a 1-stage register. When an inter-
rupt occurs, this register (SDP) is used to temporarily store the
contents of data pointer, carry flag, skip flag, register A, and regis-
ter B just before an interrupt until returning to the original routine.
Unlike the stack registers (SKs), this register (SDP) is not used
when executing the subroutine call instruction and the table refer-
ence instruction.
(7) Skip flag
Skip flag controls skip decision for the conditional skip instructions
and continuous described skip instructions. When an interrupt oc-
curs, the contents of skip flag is stored automatically in the interrupt
stack register (SDP) and the skip condition is retained.
Fig. 5 Stack registers (SKs) structure
Fig. 6 Example of operation at subroutine call
Returning to the
BM
instruction execution
address with the
RT
instruction, and the
BM
instruction becomes the
NOP
instruction.
(SP)
←
0
(SK
0
)
←
0001
16
(PC)
←
SUB1
Main program
0002
16
NOP
Address
0000
16
NOP
0001
16
BM SUB1
Subroutine
SUB1 :
NOP
·
·
RT
(PC)
←
(SK
0
)
(SP)
←
7
Note :
SK
0
SK
1
SK
2
SK
3
SK
4
SK
5
SK
6
SK
7
(SP) = 0
(SP) = 1
(SP) = 2
(SP) = 3
(SP) = 4
(SP) = 5
(SP) = 6
(SP) = 7
Program counter (PC)
Executing
RT
instruction
Executing
BM
instruction
Stack pointer (SP) points “7” at reset or
returning from RAM back-up mode. It points “0”
by executing the first
BM
instruction, and the
contents of program counter is stored in SK
0
.
When the
BM
instruction is executed after eight
stack registers are used ((SP) = 7), (SP) = 0
and the contents of SK
0
is destroyed.
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