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參數(shù)資料
| 型號： | M34570E8FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片4位微機(jī)的CMOS |
| 文件頁數(shù)： | 29/68頁 |
| 文件大?。?/td> | 319K |
| 代理商： | M34570E8FP |
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29
MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
Program counter (PC)..............................................................0
Address 0 in page 0 is set to program counter.
Interrupt enable flag (INTE) ...................................................................................
Power down flag (P)...............................................................................................
External 0 interrupt request flag (EXF0)................................................................
Interrupt control register V1 ...................................................................................
Interrupt control register V2 ...................................................................................
Interrupt control register I1 ..................................................................0
Timer 1 interrupt request flag (T1F) ......................................................................
Timer 2 interrupt request flag (T2F) ......................................................................
Timer 3 interrupt request flag (T3F) ......................................................................
Watchdog timer flags (WDF1, WDF2) ...................................................................
Watchdog timer enable flag (WEF) .......................................................................
Timer control register W1 ....................................................................0
Timer control register W2 ......................................................................................
Timer control register W3 ......................................................................................
Timer count value store register W5 ...............................................................0
Clock control register MR ......................................................................................
8-bit general-purpose register SI .................................0
Carrier wave output control register C2...........................................................0
Key-on wakeup control register K0 .......................................................................
Pull-up control register PU0...................................................................................
Carry flag (CY) .......................................................................................................
Register A ..............................................................................................................
Register B ..............................................................................................................
Register D ..............................................................................................................
Register E ..............................................................................................................
Register X ..............................................................................................................
Register Y ............................................................................................0
Register Z...............................................................................................................
Stack pointer (SP)..................................................................................................
(2) Internal state at reset
Table 12 shows port state at reset, and Figure 26 shows
internal state at reset (they are retained after system is
released from reset).
Name
D
0
–D
8
, D
9
/T
OUT
P0
0
–P0
3
P1
0
–P1
3
P2
0
, P2
1
/INT
P3
0
–P3
3
P4
0
–P4
3
CARR
Notes 1: Output latch is set to “1.”
2: The pull-up transistor is turned off.
State
High impedance (Note 1)
“H” (V
DD
) level (Note 1)
High impedance
High impedance (Note 1)
High impedance (Note 2)
“L” (V
SS
) level
Function
D
0
–D
8
, D
9
P0
0
–P0
3
P1
0
–P1
3
P2
0
, P2
1
P3
0
–P3
3
P4
0
–P4
3
CARR
Table 12 Port state at reset
The contents of timers, registers, flags and RAM except those
shown in Figure 26 are undefined, so set the initial values to
them.
Fig. 26 Internal state at reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
“
” represents undefined.
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
(Interrupt disabled)
0
0
0
0
0
0
0
0
(Interrupt disabled)
(Interrupt disabled)
0
0
0
0
0
0
0
0
0
0
(Prescaler and timer 1 stopped)
(Timer 2 stopped)
(Timer 3 stopped)
1
0
0
0
0
0
0
0
0
0
1
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