參數(shù)資料
型號(hào): M34570ED
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
中文描述: 單芯片4位微機(jī)的CMOS
文件頁(yè)數(shù): 49/68頁(yè)
文件大?。?/td> 319K
代理商: M34570ED
57
MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
Skip condition
Detailed description
C
56
MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
Function
Mnemonic
D
9
D
8
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Hexadecimal
notation
Type of
instructions
Parameter
N
w
N
c
Instruction code
TC2A
NOP
POF
EPOF
SNZP
WRST
TABSI
TSIAB
TAMR
TMRA
SBK
RBK
1
0
1
0
1
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
1
0
1
1
0
1
1
0
0
0
0
0
0
0
0
1
1
1
0
1
0
1
0
0
0
0
0
1
0
0
1
1
1
1
0
0
0
1
0
0
0
1
1
1
0
0
0
1
0
0
1
0
1
0
0
1
0
1
0
0
0
0
1
0
1
1
0
0
0
0
1
0
0
0
0
0
1
0
0
0
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
(C2
1
, C2
0
)
(A
1
, A
0
)
(PC)
(PC) + 1
Transition to RAM back-up mode
POF instruction valid
(P) = 1
(WDF1)
0, (WEF)
1
(B)
(SI
7
–SI
4
)
(A)
(SI
3
–SI
0
)
(SI
7
–SI
4
)
(B)
(SI
3
–SI
0
)
(A)
(A)
(MR
3
–MR
0
)
(MR
3
–MR
0
)
(A)
When executing the TABP p instruction,
p
6
1
When executing the TABP p instruction,
p
6
0
1
1
1
1
1
1
1
1
1
1
1
1
2 A 9
0 0 0
0 0 2
0 5 B
0 0 3
2 A 0
2 7 8
2 3 8
2 5 2
2 1 6
0 4 1
0 4 0
Transfers the contents of register A to carrier wave output control register C2.
No operation
Puts the system in RAM back-up mode state by executing the POF instruction after executing the
EPOF instruction.
Validates the POF instruction which is executed after the EPOF instruction by executing the EPOF
instruction.
Skips the next instruction when P flag is “1.”
After skipping, P flag remains unchanged.
Operates the watchdog timer and initializes the watchdog timer flag (WDF1).
Transfers the contents of general-purpose register SI to registers A and B.
Transfers the contents of registers A and B to general-purpose register SI.
Transfers the contents of clock control register MR to register A.
Transfers the contents of register A to clock control register MR.
Data area which is referred when executing the TABP p instruction is set to pages 64 to 127.
This setting is valid only for the TABP p instruction.
Data area which is referred when executing the TABP p instruction is set to pages 0 to 63.
This setting is valid only for the TABP p instruction.
If the SBK instruction is not executed, p
6
when executing the TABP p instruction is “0.”
(P) = 1
O
C
o
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