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參數(shù)資料
| 型號(hào)： | M34S32WBN5T |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | DRAM |
| 英文描述： | 32K Serial I2C Bus EEPROM With User-Defined Read-Only Block and 32-Byte OTP Page |
| 中文描述： | 32K的串行I2C總線的EEPROM與用戶定義的只讀塊和32字節(jié)檢察官頁(yè) |
| 文件頁(yè)數(shù)： | 12/18頁(yè) |
| 文件大?。?/td> | 156K |
| 代理商： | M34S32WBN5T |
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M34S32
Figure 11. Write Modes Sequence with WC = 1
and WCpol = 0
Note:
1. The device has the same behavior when WC = 0 and
WCpol = 1.
Read Operations
On delivery, the memory content is set at all “1”s
(or FFh).
Current Address Read.
The memory has an in-
ternal address counter. Each time a byte is read,
this counter is incremented. For the Current Ad-
dress Read mode, following a START condition,
the master sends a Device Select Byte with the
RW bit set to 1. The memory acknowledges this
and outputs the byte addressed by the internal ad-
dress counter. This counter is then incremented.
The master does NOT acknowledge the byte out-
put, but terminates the transfer with a STOP con-
dition.
A Current Address Read in the OTP page is per-
formed by sending the appropriate Device Select
Byte, as described in Table 3.
S
S
BYTE WRITE
DEV SEL
BYTE ADDR
BYTE ADDR
DATA IN
WC
S
PAGE WRITE
DEV SEL
BYTE ADDR
BYTE ADDR
DATA IN 1
WC
DATA IN 2
AI01120B
PAGE WRITE
(cont'd)
WC (cont'd)
S
DATA IN N
ACK
ACK
ACK
NO ACK
R/W
ACK
ACK
ACK
NO ACK
R/W
NO ACK
NO ACK
Let us suppose, again, that byte N of the OTP
page has just been addressed (for example be-
cause of a Write in the OTP page or a Random
read in the OTP page). If the next instruction uses
the Current Address Read Mode of the device, the
first byte read in EEPROM will be in page 0, at ad-
dress N+1 (or page 1, byte 0 if the last OTP byte
addressed was at location 31).
Random Address Read.
A dummy write is per-
formed to load the address into the address coun-
ter, see Figure 10. This is followed by another
START condition from the master and the byte ad-
dress repeated with the RW bit set to 1. The mem-
ory acknowledges this and outputs the byte
addressed. The master does NOT acknowledge
the byte output, but terminates the transfer with a
STOP condition.
Specific features of the Random Address read
in the OTP page.
This instruction must consist of
the two sequences shown on page 14 (Sequence
A followed by Sequence B).
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