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參數(shù)資料
| 型號： | M34S32WBN6T |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | DRAM |
| 英文描述： | 32K Serial I2C Bus EEPROM With User-Defined Read-Only Block and 32-Byte OTP Page |
| 中文描述： | 32K的串行I2C總線的EEPROM與用戶定義的只讀塊和32字節(jié)檢察官頁 |
| 文件頁數(shù)： | 6/18頁 |
| 文件大?。?/td> | 156K |
| 代理商： | M34S32WBN6T |
6/18
M34S32
Table 7. AC Measurement Conditions
Input Rise and
Fall Times
≤
50ns
Input Pulse
Voltages
0.2 V
CC
to 0.8 V
CC
Input and Output
Timing Reference
Voltages
0.3 V
CC
to 0.7 V
CC
Table 8. AC Characteristics (T
A
= 0 to 70°C,
–40 to 85°C; V
CC
= 4.5V to 5.5V, 2.5V to 5.5V)
Symbol
Alt.
Parameter
M34S32
Unit
V
CC
= 4.5V to
5.5V
V
CC
= 2.5V to
5.5V
Min.
Max.
Min.
Max.
t
CH1CH2
t
R
Clock Rise Time
300
300
ns
t
CL1CL2
t
F
Clock Fall Time
300
300
ns
t
DH1DH2 (1)
t
R
SDA Rise Time
20
300
20
300
ns
t
DL1DL2 (1)
t
F
SDA Fall Time
20
300
20
300
ns
t
CHDX (2)
t
SU:STA
Clock High to Input Transition
600
600
ns
t
CHCL
t
HIGH
Clock Pulse Width High
600
600
ns
t
DLCL
t
HD:STA
Input Low to Clock Low (START)
600
600
ns
t
CLDX
t
HD:DAT
Clock Low to Input Transition
0
0
μ
s
t
CLCH
t
LOW
Clock Pulse Width Low
1300
1300
ns
t
DXCX
t
SU:DAT
Input Transition to Clock Transition
100
100
ns
t
CHDH
t
SU:STO
Clock High to Input High (STOP)
600
600
ns
t
DHDL
t
BUF
Input High to Input Low (Bus Free)
1300
1300
ns
t
CLQV (3)
t
AA
Clock Low to Next Data Out Valid
200
900
200
900
ns
t
QLQx
t
DH
Data Out Hold Time
200
200
ns
f
C
f
SCL
Clock Frequency
400
400
kHz
t
W
t
WR
Write Time
10
10
ms
Note:
1. Sampled only, not 100% tested in production.
2. For a reSTART condition, or following a write cycle.
3. The minimum value delays the falling/rising edge of SDA away from SCL=1 in order to avoid unwanted START and/or STOP
conditions.
Figure 6. AC Testing Input/Output Waveforms
AI00825
0.8VCC
0.2VCC
0.7VCC
0.3VCC
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| M34S32WMN1T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32K Serial I2C Bus EEPROM With User-Defined Read-Only Block and 32-Byte OTP Page |
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