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參數(shù)資料
| 型號(hào)： | M35080FP |
| 元件分類： | 顯示控制器 |
| 英文描述： | 128 X 96 DOTS CRT CHAR OR GRPH DSPL CTLR, PDSO24 |
| 封裝： | 0.300 INCH, 0.80 MM PITCH, SSOP-24 |
| 文件頁數(shù)： | 11/22頁 |
| 文件大小： | 162K |
| 代理商： | M35080FP |
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
19
DATA INPUT EXAMPLE
Data of Bit map RAM and display control registers can be set by
the 16-bit serial input function. Example of data setting is shown in
Figure 14.
Fig. 14 Example of data setting
DA0
DA1
DAF
DAE DAD DAC DAB
DAA
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
Address/Data
Remarks
000
000000000000
0
000000000000001
1
000000000000000
0
000000000000000
0
000000000000000
1
0
VSIZE1 VSIZE0
0
VP9 VP8 VP7 VP6 VP5 VP4 VP3 VP2 VP1 VP0
000000
HP9 HP8 HP7 HP6 HP5 HP4 HP3 HP2 HP1 HP0
0000000000
0
POLV POLH MODE2 MODE1 MODE0
0
1
0
00
0
SBLANK
3
SBLANK
2
SBLANK
1
SBLANK 0
PTD3
000100000000000
0
Bit map RAM (Page A)
(R0,R1,R2,G0,G1,G2,B0,B1,B2)
Bit map RAM (PageB)
(R0,R1,R2,G0,G1,G2,B0,B1,B2)
000000000000000
0
000000000000001
0
VSIZE1 VSIZE0
0
VP9 VP8 VP7 VP6 VP5 VP4 VP3 VP2 VP1 VP0
000000
HP9 HP8 HP7 HP6 HP5 HP4 HP3 HP2 HP1 HP0
000100000000000
0
000000000000000
0
000000000000001
1
000000000001000
0
Address setting
Page A and B display OFF
Page A and B writing setting
(Note 1)
Page A and B writing setting
Page A writing setting
Page B writing setting
Display form setting
—
DAC setting
Port output setting
Address setting
Display ON
Bit map setting
Vertical display
location setting
Horizontal display
location setting
Page
A
Vertical display
location setting
Horizontal display
location setting
Page
B
Page
B
Bit map setting
Page
A
Address 000016
Data
000016
Data
000116
Address 000016
Data
000716
Data
000616
Data
000516
Data
000416
Data
000316
Data
000216
Data
000016
Address 100016
Data
100116
Data
100016
Data
3AFF16
Data
3AFE16
Address 000016
Address 100016
Address 000016
Data
000116
Data
000016
Data
3AFF16
Data
3AFF16
Data
100116
Data
100016
Data
000316
Data
000216
Data
000016
Notes 1. Registers PAGEONA and PAGEONB perform writing control of data.
2. Input the clock with which the cycle was fixed and continued from the TCK pin. Moreover, input horizontal synchronized signal into HOR pin,
and input vertical synchronized signal into VERT pin.
............
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