參數(shù)資料
型號： M36LLR8760TT
廠商： 意法半導(dǎo)體
英文描述： 256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
中文描述： 256 128兆位（多銀行，多層次，突發(fā)）64兆位閃存（突發(fā)）移動存儲芯片，1.8V電源，多芯片封裝
文件頁數(shù)： 7/19頁
文件大?。?/td> 427K
代理商： M36LLR8760TT
7/19
M36LLR8760T1, M36LLR8760D1, M36LLR8760M1, M36LLR8760B1
SIGNAL DESCRIPTIONS
See
Figure 2., Logic Diagram
and
Table 1., Signal
Names
, for a brief overview of the signals connect-
ed to this device.
Address Inputs (A0-A23).
Addresses
are common inputs for the Flash memory and
PSRAM components. A22 is common to the two
Flash memory components whereas A23 is an ad-
dress input for the 256 Mbit Flash memory compo-
nent only.
The Address Inputs select the cells in the memory
array to access during Bus Read operations. Dur-
ing Bus Write operations they control the com-
mands sent to the Command Interface of the
internal state machine. The Flash memories are
accessed through the Chip Enable signal (E
F
) and
through the Write Enable signal (W
F
), while the
PSRAM is accessed through the Chip Enable sig-
nal (E
P
) and the Write Enable signal (W
P
).
It is not allowed to have E
F
Low, and E
P
Low at the
same time.
A0-A21
Data Input/Output (DQ0-DQ15).
The Data I/O
output the data stored at the selected address dur-
ing a Bus Read operation or input a command or
the data to be programmed during a Bus Write op-
eration.
For the PSRAM component, the upper Byte Data
Inputs/Outputs (DQ8-DQ15) carry the data to or
from the upper part of the selected address when
Upper Byte Enable (UB
P
) is driven Low. The lower
Byte Data Inputs/Outputs (DQ0-DQ7) carry the
data to or from the lower part of the selected ad-
dress when Lower Byte Enable (LB
P
) is driven
Low. When both UB
P
and LB
P
are disabled, the
Data Inputs/ Outputs are high impedance.
Latch Enable (L).
The Latch Enable pin is com-
mon to the Flash memory and PSRAM compo-
nents.
For details of how the Latch Enable signal be-
haves, please refer to the datasheets of the re-
spective memory components: M69KB096AA for
the
PSRAM
and
M30L0R8000(T/B)0
M58LR128GT/B for Flash 1 and Flash 2, respec-
tively.
and
Clock (K).
The Clock input pin is common to the
Flash memory and PSRAM components.
For details of how the Clock signal behaves,
please refer to the datasheets of the respective
memory components: M69KB096AA for the
PSRAM
and
M30L0R8000(T/B)0
M58LR128GT/B for Flash 1 and Flash 2, respec-
tively.
and
Wait (WAIT).
WAIT is an output pin common to
the Flash memory and PSRAM components. How-
ever the WAIT signal does not behave in the same
way for the PSRAM and the Flash memories.
For details of how it behaves, please refer to the
M69KB096AA datasheet for the PSRAM and to
the
M30L0R8000T/B0
datasheets for Flash 1 and Flash 2, respectively.
and
M58LR128GT/B
Flash Chip Enable Inputs (E
F1
, E
F2
).
The
Flash Chip Enable inputs activate the control logic,
input buffers, decoders and sense amplifiers of the
Flash memory component selected (E
F1
is used to
select Flash 1, E
F2
is used to select Flash 2).
When Chip Enable is Low, V
IL
, and
Reset is High,
V
IH
, the device is in active mode. When Chip En-
able is at V
IH
the corresponding Flash memory are
deselected, the outputs are high impedance and
the power consumption is reduced to the standby
level.
It is not allowed to have E
F1
at V
IL
, E
F2
at V
IL
and
E
P
at V
IL
at the same time. Only one memory com-
ponent can be enabled at a time.
Flash Output Enable Inputs (G
F1
, G
F2
).
The
Output Enable pins control the data outputs during
Flash memory Bus Read operations.
Flash Write Enable (
W
F
).
The
controls the Bus Write operation of the Flash
memories’ Command Interface. The data and ad-
dress inputs are latched on the rising edge of Chip
Enable or Write Enable whichever occurs first.
Write
Enable
Flash Write Protect (WP
F
).
Write Protect is an
input that gives an additional hardware protection
for each block. When Write Protect is Low, V
IL
,
Lock-Down is enabled and the protection status of
the Locked-Down blocks cannot be changed.
When Write Protect is at High, V
IH
, Lock-Down is
disabled and the Locked-Down blocks can be
locked or unlocked. (See the Lock Status Table in
the M30L0R8000(T/B)0 and M58LR128GT/B
datasheets).
Flash Reset (RP
F
).
The Reset input provides a
hardware reset of the Flash memories. When Re-
set is at V
IL
, the memory is in Reset mode: the out-
puts are high impedance and the current
consumption is reduced to the Reset Supply Cur-
rent I
DD2
. Refer to
Table 6., Flash 1 DC Character-
istics - Currents
, for the value of I
DD2
. After Reset
all blocks are in the Locked state and the Configu-
ration Register is reset. When Reset is at V
IH
, the
device is in normal operation. Exiting Reset mode
the device enters Asynchronous Read mode, but
相關(guān)PDF資料
PDF描述
M36LLR8760D 256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
M36LLR876B0 256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
M36LLR876B0E 256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
M36P0R9070E0 512 Mbit (x16, Multiple Bank, Multi-Level, Burst) Flash Memory 128 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
M36P0R9070E0ZAC 512 Mbit (x16, Multiple Bank, Multi-Level, Burst) Flash Memory 128 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M36LLR876B0 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
M36LLR876B0E 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
M-36M25M-10M 制造商:Pan Pacific 功能描述:
M-36M25M-6M 制造商:Pan Pacific 功能描述:
M-36MM-6M 制造商:Pan Pacific 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*