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參數(shù)資料
| 型號： | M37151MA-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8.1 MHz, MICROCONTROLLER, PDSO42 |
| 封裝： | 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-42 |
| 文件頁數(shù)： | 91/139頁 |
| 文件大?。?/td> | 1690K |
| 代理商： | M37151MA-XXXFP |
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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37151M6/M8/MA/MC/MF-XXXFP, M37151EFFP
MITSUBISHI MICROCOMPUTERS
54
Rev. 1.0
8.10.6 Data Slice Line Specification Circuit
(1) Specification of data slice line
This circuit determines the lines on to which caption data is super-
imposed. Data can be sliced for line 21 and one arbitrary line in
both field (2 lines total per field). The caption position register (ad-
dress 00E616) is used for each setting (refer to Table 8.10.1).
The counter is reset at the falling edge of Vsep and is incremented
by 1 every Hsep pulse. When the counter value matches the value
specified by bits 4 to 0 of the caption position register, this Hsep is
sliced.
The values of “0016” to “1F16” can be set in the caption position
register (when setting only one arbitrary line). Figure 8.10.8 shows
the signals in the vertical blanking interval. Figure 8.10.9 shows
the structure of the caption position register.
(2) Specification of line to set slice voltage
Table 8.10.1 shows which field and line generates the reference
slice voltage for the clock run-in pulse of each line. The field to
generate slice voltage is specified by bit 1 of data slicer control
register 1. The line to generate slice voltage for one field is speci-
fied by bits 6 and 7 of the caption position register (refer to
Table 8.10.1).
Fig. 8.10.8 Signals in Vertical Blanking Interval
(3) Field determination
The field determination flag can be read out by bit 3 of data slicer
control register 2. This flag changes at the falling edge of Vsep.
Video signal
Vertical blanking interval
Composite
video signal
Count value to be set in the caption position register (“0F 16” in this case)
Hsep
Vsep
Hsep
Magnified
drawing
Clock run-in
Start bit + 16-bit data
Start bit
Window for
deteminating
clock-run-in
Composite video
signal
Line 21
1 appropriate line is set by
the caption position register
(when setting line 19)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M37161M8-XXXFP | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO42 |
| M37161EFSP | 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| M37161MF-XXXFP | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO42 |
| M37161M8-XXXSP | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| M37212EFFP | 8-BIT, OTPROM, 8.1 MHz, MICROCONTROLLER, PQFP80 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M37151MC | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SNGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37151MC-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER |
| M37151MF-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER |
| M37160EFFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37160EFSP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
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