參數(shù)資料
型號: M37161M8-XXXSP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42
封裝: 0.600 INCH, 1.78 MM PITCH, PLASTIC, SDIP-42
文件頁數(shù): 123/129頁
文件大?。?/td> 1092K
代理商: M37161M8-XXXSP
Rev.1.00
2003.11.25
page 93 of 128
M37161M8/MA/MF-XXXSP/FP,M37161EFSP/FP
13. A-D CONVERTER CHARACTERISTICS
(VCC = 5 V ± 10 %, VSS = 0 V, f(XIN) = 8MHz, Ta = –10 °C to 70 °C, unless otherwise noted)
Resolution
Non-linearity error
Differencial non-linearity error
Zero transition error
Full-scale transition error
Max.
7
±1.5
±0.9
2
–2
bits
LSB
Min.
Limits
Unit
Test conditions
Parameter
Symbol
V0T
VFST
IOL (SUM) = 0 mA
Typ.
14. MULTI-MASTER I2C-BUS BUS LINE CHARACTERISTICS
Bus free time
Hold time for START condition
LOW period of SCL clock
Rising time of both SCL and SDA signals
Data hold time
HIGH period of SCL clock
Falling time of both SCL and SDA signals
Data set-up time
Set-up time for repeated START condition
Set-up time for STOP condition
tBUF
tHD; STA
tLOW
tR
tHD; DAT
tHIGH
tF
tSU; DAT
tSU; STA
tSU; STO
Max.
1000
300
Min.
1.3
0.6
1.3
20+0.1Cb
0
0.6
20+0.1Cb
100
0.6
Max.
300
0.9
300
s
ns
s
ns
s
Unit
Standard clock mode High-speed clock mode
Parameter
Symbol
Note: Cb = total capacitance of 1 bus line
Fig.14.1 Definition Diagram of Timing on Multi-master I2C-BUS
Min.
4.7
4.0
4.7
0
4.0
250
4.7
4.0
SDA
SCL
P
tBUF
S
tHD;STA
tLOW
tR
tHD;DAT
tHIGH
tF
tSU;DAT
tSU;STA
Sr
P
tSU;STO
tHD;STA
S
Sr
P
: Start condition
: Restart condition
: Stop condition
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