參數(shù)資料
型號： M37481E8-XXXSP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PDIP42
封裝： 0.600 INCH, 1.78 MM PITCH, SHRINK, PLASTIC, DIP-42
文件頁數(shù)： 9/100頁
文件大小： 1457K
代理商： M37481E8-XXXSP
13
MITSUBISHI MICROCOMPUTERS
7480/7481 GROUP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
[Pull-up Control Registers]
Ports P0 and P1 are provided with a programmable pull-up tran-
sistor. When “1” is written to the pull-up control register and the
direction register is in the input mode, the pull-up transistor turns
on, and the port is pulled up.
s Notes on Use for STP Instruction
When the 7480/7481 group is executing an STP instruction, apply
0 V or the same voltage as Vcc to the following pins.
If an intermediate voltage is applied to these pins, a through-cur-
rent flows to the input gates and the power current increases.
P4, P5, P3, P16, P14
[Port P4P5 Input Control Register]
When ports P42, P43 and P5 of the 7481 group are selected for in-
put, clear the corresponding direction register to “0” and set “1” to
the corresponding bit of the port P4P5 input control register.
Ports P42, P43 and P5 are not included in the 7480 group. Fix
each bit of the port P4P5 input control register to “0”.
Fig. 10 Structure of pull-up control register
I/O Ports
[Direction Registers]
The I/O ports have direction registers which determine the input/
output direction of each pin in units of bit. When a bit of the direc-
tion register is set to “1”, the corresponding pin becomes an output
port. When the bit is cleared to “0”, it becomes an input port.
If data is read from a pin configured as output, the value of the
port latch is read rather than the value of this pin.
A pin configured as input becomes floating and its value can be
read. If data is written to a pin, it is written to the port latch, but the
pin remains floating.
Fig. 11 Structure of port P4P5 input control register
Port P4P5 input control register
(P4P5CON : address 00D216)
P42, P43 input control bit
P5 input control bit
(For the 7480 group) Set this bit to “0”.
(For the 7481 group) Set this bit to “1”.
b7
b0
Not used (“0” at read)
Port P1 pull-up control register
(P1PCON : address 00D116)
P13 – P10 pull-up control bit
P17 – P14 pull-up control bit
b7
b0
Port P0 pull-up control register
(P0PCON : address 00D016)
P00 pull-up control bit
P01 pull-up control bit
P02 pull-up control bit
P03 pull-up control bit
P04 pull-up control bit
P05 pull-up control bit
P06 pull-up control bit
P07 pull-up control bit
b7
b0
0 : Pull-up transistor OFF
1 : Pull-up transistor ON
0 : Pull-up transistor OFF
1 : Pull-up transistor ON
Not used (undefined at read)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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