REJ03B0160-0122 Rev.1.22 Mar 13, 2009
page 100 of 100
7546 Group
Notes on Oscillation Stop Detection Circuit
1. After the reset by the oscillation stop detection, the value of fol-
lowing bits are retained, not initialized.
Ceramic or RC oscillation stop detection function active bit
Bit 1 of MISRG (address 003B16)
Oscillation stop detection status bit
Bit 3 of MISRG
2. Oscillation stop detection status bit is initialized (“0”) by the fol-
lowing operation.
External reset
Write “0” data to the ceramic or RC oscillation stop detection
function active bit.
3. The oscillation stop detection circuit is not included in the emu-
lator MCU “M37542RSS”.
Note on Power Source Voltage
When the power source voltage value of a microcomputer is less
than the value which is indicated as the recommended operating
conditions, the microcomputer does not operate normally and may
perform unstable operation.
In a system where the power source voltage drops slowly when
the power source voltage drops or the power supply is turned off,
reset a microcomputer when the supply voltage is less than the
recommended operating conditions and design a system not to
cause errors to the system by this unstable operation.
NOTES ON HARDWARE
Handling of Power Source Pin
In order to avoid a latch-up occurrence, connect a capacitor suit-
able for high frequencies as bypass capacitor between power
source pin (Vcc pin) and GND pin (Vss pin). Besides, connect the
capacitor to as close as possible. For bypass capacitor which
should not be located too far from the pins to be connected, a ce-
ramic capacitor of 0.01 F to 0.1 F is recommended.
Fig. 7 Timing Diagram (bold-lined periods are applicable)
NOTES ON QzROM
Product shipped in blank
As for the product shipped in blank, Renesas does not perform the
writing test to user ROM area after the assembly process though
the QzROM writing test is performed enough before the assembly
process. Therefore, a writing error of approx.0.1 % may occur.
Moreover, please note the contact of cables and foreign bodies on
a socket, etc. because a writing environment may cause some
writing errors.
Precautions Regarding Overvoltage
Make sure that voltage exceeding the VCC pin voltage is not ap-
plied to other pins. In particular, ensure that the state indicated by
bold lines in Figure below does not occur for CNVSS pin (VPP
power source pin for QzROM) during power-on or power-off. Oth-
erwise the contents of QzROM could be rewritten.
VCC pin voltage
CNVSS pin voltage
“L” input
1.8V
(1) Input voltage to other MCU pins rises before VCC pin voltage.
(2) Input voltage to other MCU pins falls after VCC pin voltage.
Note: The internal circuitry is unstable when VCC is below the minimum voltage
specification of 1.8V (shaded portion), so particular care should be exercised
regarding overvoltage.
Notes On QzROM Writing Orders
When ordering the QzROM product shipped after writing, submit
the mask file (extension: .msk) which is made by the mask file
converter MM.
Be sure to set the ROM option data* setup when making the
mask file by using the mask file converter MM.. The ROM code
protect is specified according to the ROM option data* in the
mask file which is submitted at ordering. Note that the mask file
which has nothing at the ROM option data* or has the data other
than “0016” and “FF16” can not be accepted.
Set “FF16” to the ROM code protect address in ROM data re-
gardless of the presence or absence of a protect. When data
other than “FF16” is set, we may ask that the ROM data be sub-
mitted again.
* ROM option data: mask option noted in MM
Data Required For QzROM Writing Orders
The following are necessary when ordering a QzROM product
shipped after writing:
1. QzROM Writing Confirmation Form*
2. Mark Specification Form*
3. ROM data...........Mask file
* For the QzROM writing confirmation form and the mark specifi-
cation form, refer to the “Renesas Technology Corp.” Homepage
(http://www.renesas.com/homepage.jsp).
Note that we cannot deal with special font marking (customer's
trademark etc.) in QzROM microcomputer.