7905 Group User’s Manual Rev.1.0
11-49
SERIAL I/O
11.4 Clock asynchronous serial I/O (UART) mode
Reception will start when the start bit (’s
falling edge) is detected.
b7
b0
0
Pin RxD0
Pin RxD1
b7
b0
b7
b0
Set the same transfer data format
as that of the transmitter side.
1
b7
b0
b7
b0
1
b7
b0
0
UARTi receive interrupt mode select bit
0: Reception interrupt
1: Reception error interrupt
b7
b0
1: Functions as P13.
1: Functions as P17.
b7
b0
Pin RxD2
1: Functions as P83.
0
UART0 transmit/receive mode register (Address 3016)
UART1 transmit/receive mode register (Address 3816)
UART2 transmit/receive mode register (Address B016)
b2 b1 b0
Selection of clock synchronous serial
I/O mode
1 0 0: UART mode (7 bits)
1 0 1: UART mode (8 bits)
1 1 0: UART mode (9 bits)
Internal/External clock select bit
0: Internal clock
1: External clock
Stop bit length select bit
0: 1 stop bit
1: 2 stop bits
Parity enable bit
0: Parity is disabled.
1: Parity is enabled.
Odd/Even parity select bit
0: Odd parity
1: Even parity
Sleep select bit
0: Sleep mode cleared (invalid)
1: Sleep mode selected
UART0 transmit/receive control register 0 (Address 3416)
UART1 transmit/receive control register 0 (Address 3C16)
UART2 transmit/receive control register 0 (Address B416)
BRG count source select bits
b1 b0
0 0: f2
0 1: f16
1 0: f64
1 1: f512
CTS/RTS function select bit
0: CTS function selected
1: RTS function selected
CTS/RTS enable bit
0: CTS/RTS function is enabled.
1: CTS/RTS function is disabled.
Serial I/O pin control register (Address AC16)
CTS0/RTS0 separate select bit
0: CTS0/RTS0 are used together.
1: CTS0/RTS0 are separated (Note 1).
CTS1/RTS1 separate select bit
0: CTS1/RTS1 are used together.
1: CTS1/RTS1 are separated (Note 1).
TxD0/P13 switch bit (Note 2)
0: Functions as TxD0.
TxD1/P17 switch bit (Note 2)
0: Functions as TxD1.
CTS2/RTS2 separate select bit
0: CTS2/RTS2 are used together.
1: CTS2/RTS2 are separated (Note 1).
TxD2/P83 switch bit (Note 2)
0: Functions as TxD2.
Note 1: The CLKi pin cannot be used when
the CTSi/RTSi separation is selected.
(Refer to “[Precaution for clock
asynchronous serial I/O (UART)
mode].”)
2: When performing reception only,
if these bits are set to “1,” the
TxDi pin can be used as a
programmable I/O port pin.
UART0 baud rate register (BRG0) (Address 3116)
UART1 baud rate register (BRG1) (Address 3916)
UART2 baud rate register (BRG2) (Address B116)
Can be set to “0016” to “FF16”
Port P1 direction register (Address 516)
Port P8 direction register (Address 1416)
UART1 receive interrupt control register (Address 7416)
UART0 receive interrupt control register (Address 7216)
UART2 receive interrupt control register (Address F216)
Interrupt priority level select bits
When using interrupts, set these bits to
one of levels 1 to 7.
When disabling interrupts, set these bits
to level 0.
UART0 transmit/receive control register 1 (Address 3516)
UART1 transmit/receive control register 1 (Address 3D16)
UART2 transmit/receive control register 1 (Address B516)
Transmit enable bit
1: Transmission enabled
Fig. 11.4.10 Initial setting example for relevant registers when receiving