參數(shù)資料
型號： M38001S4-XXXHP
廠商： Mitsubishi Electric Corporation
英文描述： High Speed High Drive Precision Quad Operational Amplifier 14-CDIP -55 to 125
中文描述： 8位單片機
文件頁數(shù)： 43/173頁
文件大?。?/td> 4203K
代理商： M38001S4-XXXHP
HARDWARE
1-29
3800 GROUP USER’S MANUAL
Processor Modes
Single-chip mode, memory expansion mode, and microprocessor
mode can be selected by changing the contents of the processor
mode bits CM
0
and CM
1
(bits 0 and 1 of address 003B
16
). In
memory expansion mode and microprocessor mode, memory can
be expanded externally through ports P0 to P3. In these modes,
ports P0 to P3 lose their I/O port functions and become bus pins.
Fig. 28 Memory maps in various processor modes
Fig. 29 Structure of CPU mode register
Single-Chip Mode
Select this mode by resetting the microcomputer with CNV
SS
con-
nected to V
SS
.
Memory Expansion Mode
Select this mode by setting the processor mode bits to “01” in soft-
ware with CNV
SS
connected to V
SS
. This mode enables external
memory expansion while maintaining the validity of the internal
ROM. Internal ROM will take precedence over external memory if
addresses conflict.
Microprocessor Mode
Select this mode by resetting the microcomputer with CNV
SS
con-
nected to V
CC
, or by setting the processor mode bits to “10” in
software with CNV
SS
connected to V
SS
. In microprocessor mode,
the internal ROM is no longer valid and external memory must be
used.
FUNCTIONAL DESCRIPTION
Port Name
Port P0
Port P1
Port P2
Port P3
Function
Outputs low-order byte of address.
Outputs high-order byte of address.
Operates as I/O pins for data D
7
to D
0
(including instruction codes).
P3
0
and P3
1
function only as output pins
(except that the port latch cannot be read).
P3
2
is the ONW input pin.
P3
3
is the RESET
OUT
output pin. (Note)
P3
4
is the
φ
output pin.
P3
5
is the SYNC output pin.
P3
6
is the WR output pin, and P3
7
is the
RD output pin.
Note
: If CNV
SS
is connected to V
SS
, the microcomputer goes to
single-chip mode after a reset, so this pin cannot be used
as the RESET
OUT
output pin.
Table 8.
Functions of ports in memory expansion mode and
microprocessor mode
0000
16
0008
16
SFR area
0040
16
Internal RAM
reserved area
0000
16
0008
16
0040
16
Internal RAM
reserved area
YYYY
16
Internal ROM
FFFF
16
FFFF
16
Microprocessor mode
Memory expansion mode
The shaded areas are external memory areas.
:
YYYY
16
is the start address of internal ROM.
SFR area
8
0440
16
8
0440
16
b0
CPU mode register
(CPUM : address 003B
16
)
Processor mode bits
0 0 : Single-chip mode
0 1 : Memory expansion mode
1 0 : Microprocessor mode
1 1 : Not available
Stack page selection bit
0 : 0 page
1 : 1 page
b7
Not used (return “0” when read)
b1 b0
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