Addressing mode
Symbol
Function
Details
IMP
IMM
A
BIT, A
ZP
BIT, ZP
OP n
# OP n
# OP n
# OP n
# OP n
#
OP n
#
APPENDIX
3.10 Machine instructions
3-66
3802 GROUP USER'S MANUAL
3.10 Machine instructions
Adds the carry, accumulator and memory con-
tents. The results are entered into the
accumulator.
Adds the contents of the memory in the ad-
dress indicated by index register X, the
contents of the memory specified by the ad-
dressing mode and the carry. The results are
entered into the memory at the address indi-
cated by index register X.
“AND’s” the accumulator and memory con-
tents.
The results are entered into the accumulator.
“AND’s” the contents of the memory of the ad-
dress indicated by index register X and the
contents of the memory specified by the ad-
dressing mode. The results are entered into
the memory at the address indicated by index
register X.
Shifts the contents of accumulator or contents
of memory one bit to the left. The low order bit
of the accumulator or memory is cleared and
the high order bit is shifted into the carry flag.
Branches when the contents of the bit speci-
fied in the accumulator or memory is “0”.
Branches when the contents of the bit speci-
fied in the accumulator or memory is “1”.
Branches when the contents of carry flag is
“0”.
Branches when the contents of carry flag is
“1”.
Branches when the contents of zero flag is “1”.
“AND’s” the contents of accumulator and
memory. The results are not entered any-
where.
Branches when the contents of negative flag is
“1”.
Branches when the contents of zero flag is “0”.
Branches when the contents of negative flag is
“0”.
Jumps to address specified by adding offset to
the program counter.
Executes a software interrupt.
ADC
(Note 1)
(Note 5)
AND
(Note 1)
ASL
BBC
(Note 4)
BBS
(Note 4)
BCC
(Note 4)
BCS
(Note 4)
BEQ
(Note 4)
BIT
BMI
(Note 4)
BNE
(Note 4)
BPL
(Note 4)
BRA
BRK
00
7 0
C
←
←
0
7
1
29 2
2
0A 2
1
03
+
2i
17
+
2i
07
+
2i
06 5
2
25 3
2
3
65 3
2
69 2
2
4
4
2
2
13
+
2i
5
5
3
3
24
When T = 0
A
←
A + M + C
When T = 1
M(X)
←
M(X) + M + C
When T = 0
A
←
A M
When T = 1
M(X)
←
M(X) M
Ab or Mb = 0
Ab or Mb = 1
C = 0
C = 1
Z = 1
A M
V
N = 1
Z = 0
N = 0
PC
←
PC
±
offset
B
←
1
M(S)
←
PC
H
S
←
S – 1
M(S)
←
PC
L
S
←
S – 1
←
PS
S
←
S – 1
PC
L
←
AD
L
PC
H
←
AD
H
V
V
2