參數(shù)資料
型號： M38006M1-XXXSS
廠商： Mitsubishi Electric Corporation
元件分類： 串行ADC
英文描述： 8-Bit 37.9 kSPS ADC Serial Out, Ratiometric Op or Vcc Ref, TTL/MOS Input & Output Compatible, 8 Ch. 20-SOIC
中文描述： 8位單片機
文件頁數(shù)： 47/173頁
文件大?。?/td> 4203K
代理商： M38006M1-XXXSS
HARDWARE
1-33
3800 GROUP USER’S MANUAL
FUNCTIONAL DESCRIPTION SUPPLEMENT
FUNCTIONAL DESCRIPTION SUPPLEMENT
Interrupt
3800 group permits interrupts on the basis of 15 sources. It is vec-
tor interrupts with a fixed priority system. Accordingly, when two or
more interrupt requests occur during the same sampling, the
higher-priority interrupt is accepted first. This priority is determined
by hardware, but variety of priority processing can be performed
by software, using an interrupt enable bit and an interrupt disable
flag.
For interrupt sources, vector addresses and interrupt priority, refer
to
“Table 10.”
Table 10. Interrupt sources, vector addresses and interrupt priority
Note:
Reset functions in the same way as an interrupt with the highest priority.
Priority
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Remarks
Non-maskable
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
Valid when serial I/O is selected
Valid when serial I/O is selected
STP release timer underflow
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
Non-maskable software interrupt
Vector addresses
FFFD
16
FFFB
16
FFF9
16
FFF7
16
FFF5
16
FFF3
16
FFF1
16
FFEF
16
FFED
16
FFEB
16
FFE9
16
FFE7
16
FFE5
16
FFE3
16
FFE1
16
FFDD
16
FFFC
16
FFFA
16
FFF8
16
FFF6
16
FFF4
16
FFF2
16
FFF0
16
FFEE
16
FFEC
16
FFEA
16
FFE8
16
FFE6
16
FFE4
16
FFE2
16
FFE0
16
FFDC
16
High-order
Low-order
Interrupt sources
Reset (Note)
INT
0
interrupt
INT
1
interrupt
Serial I/O receive interrupt
Serial I/O transmit interrupt
Timer X interrupt
Timer Y interrupt
Timer 1 interrupt
Timer 2 interrupt
CNTR
0
interrupt
CNTR
1
interrupt
INT
2
interrupt
INT
3
interrupt
INT
4
interrupt
INT
5
interrupt
BRK instruction interrupt
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