2.3 Serial I/O
2-46
APPLICATION
3802 GROUP USER’S MANUAL
Control in the slave unit
After a setting of the related registers is completed as shown in Figure 2.3.33, the slave unit becomes the
state which is received a synchronizing clock at all times, and the Serial I/O1 receive interrupt request bit
is set to “1” every time an 8-bit synchronous clock is received.
By the serial I/O1 receive interrupt processing routine, the data to be transmitted next is written to the
Transmit buffer register after received data is read out.
However, if no serial I/O1 receive interrupt occurs for more than a certain time (head adjustive time), the
following processing will be performed.
1. The first 1 byte data of the transmission data in the block is written into the Transmit buffer register.
2. The data to be received next is processed as the first 1 byte of the received data in the block.
Figure 2.3.35 shows the control in the slave unit using a serial I/O1 receive interrupt and any timer interrupt
(for head adjustive).
Fig. 2.3.35 Control in the slave unit
Write a transmission data
Read a reception data
N
Within a block transfer period
Y
Y
A received byte counter
≥
8
N
RTI
Write any data (FF
16
)
A received byte counter +1
Heading adjustive
counter
Initialized
value (
Note 3
)
Serial I/O1 receive interrupt
processing routine
Timer interrupt processing
routine
Heading adjustive counter – 1
N
Heading adjustive
counter = 0
Y
RTI
Write the first transmission data
(first byte) in a block
A received byte counter
0
Check the received byte
counter to judge if a block
has been transfered.
heading adjustive time divided by the timer interrupt
cycle as the initialized value of the heading adjustive
counter.
For example:
When the heading adjustive time is 8 ms
and the timer interrupt cycle is 1 ms, set
8 as the initialized value.
3:
G
CLT (
Note 1
)
CLD (
Note 2
)
Push register to stack
Push the register used in
the interrupt processing
routine into the stack.
G
CLT (
Note 1
)
CLD (
Note 2
)
Push register to stack
Push the register used in
the interrupt processing
routine into the stack.
G
Pop registers
Pop registers which is
pushed to stack.
G
Pop registers
Pop registers which is
pushed to stack.
G
Notes 1:
When using the Index X mode flag (T).
2:
When using the Decimal mode flag (D).