參數(shù)資料
型號(hào): M38025M1D768FS
廠商: Mitsubishi Electric Corporation
英文描述: Low-Voltage Rail-To-Rail Dual Operational Amplifier 8-SOIC -40 to 125
中文描述: 8位單片機(jī)
文件頁(yè)數(shù): 136/207頁(yè)
文件大?。?/td> 2389K
代理商: M38025M1D768FS
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3802 GROUP USER'S MANUAL
3-10
APPENDIX
3.1 Electrical characteristics
When STP instruction
is executed with clock
stopped, output
transistors isolated.
Note 1:
P4
5
is measured when the P4
5
/T
X
D P-channel output disable bit of the UART control register (bit 4 of address 001B
16
) is “0”.
P5
1
is measured when the P5
1
/S
OUT2
P-channel output disable bit of the serial I/O2 control register (bit 7 of address 001D
16
) is “0”.
2:
With output transistors isolated and A-D converter having completed conversion, and not including current flowing through V
REF
pin.
2.0
5.0
5.0
–5.0
5.5
13
8
1
10
“H” output voltage P0
0
–P0
7
, P1
0
–P1
7
, P2
0
–P2
7
,
P3
0
–P3
7
, P4
0
–P4
7
, P5
0
–P5
7
,
P6
0
–P6
7
(Note 1)
“L” output voltage
P0
0
–P0
7
, P1
0
–P1
7
, P2
0
–P2
7
,
P3
0
–P3
7
, P4
0
–P4
7
,P5
0
–P5
7
,
P6
0
–P6
7
Hysteresis
CNTR
0
, CNTR
1
, INT
0
–INT
4
Hysteresis
R
X
D, S
CLK1
, S
IN2
, S
CLK2
Hysteresis
RESET
“H” input current
P0
0
–P0
7
, P1
0
–P1
7
, P2
0
–P2
7
,
P3
0
–P3
7
, P4
0
–P4
7
, P5
0
–P5
7
,
P6
0
–P6
7
“H” input current
RESET
, CNV
SS
“H” input current
X
IN
“L” input current
P0
0
–P0
7
, P1
0
–P1
7
, P2
0
–P2
7
,
P3
0
–P3
7
, P4
0
–P4
7
, P5
0
–P5
7
,
P6
0
–P6
7
, RESET, CNV
SS
“L” input current
X
IN
RAM hold voltage
Symbol
Parameter
Limits
Typ.
Min.
Unit
V
CC
–2.0
0.4
0.5
0.5
4
–4
6.4
4
1.5
1
0.1
Max.
I
OH
= –10 mA
I
OL
= 10 mA
V
I
= V
CC
V
I
= V
CC
V
I
= V
CC
V
I
= V
SS
V
I
= V
SS
When clock stopped
f(X
IN
) = 8 MHz
f(X
IN
) = 5 MHz
When WIT instruction is executed
with f(X
IN
) = 8 MHz
When WIT instruction is executed
with f(X
IN
) = 5 MHz
T
a
= 25
°
C
(Note 2)
T
a
= 85
°
C
(Note 2)
2.0
Test conditions
Note:
When D-A conversion registers (addresses 0036
16
and 0037
16
) contain “00
16
”.
8
±
2.5
50
200
5.0
Resolution
Absolute accuracy (excluding quantization error)
Conversion time
Ladder resistor
Reference power source input current (Note)
A-D port input current
t
CONV
R
LADDER
I
VREF
I
I(AD)
Symbol
Parameter
Limits
Typ.
Min.
Bits
LSB
t
C
(
φ
)
k
μ
A
μ
A
Unit
50
Max.
V
REF
= 5.0 V
Test conditions
±
1
35
150
0.5
Table 3.1.17 A-D CONVERTER CHARACTERISTICS (Extended operating temperature version)
(V
CC
= 4.0 to 5.5 V, V
SS
= AV
SS
= 0 V, V
REF
= 2.0 V to V
CC
, T
a
= –40 to 85
°
C, unless otherwise noted)
V
T+
– V
T–
V
T+
– V
T–
V
T+
– V
T–
I
IH
I
IH
I
IH
I
IL
I
IL
V
RAM
V
OH
V
OL
V
V
V
V
V
μ
A
μ
A
μ
A
μ
A
μ
A
V
Power source current
mA
Table 3.1.16 Electrical characteristics (Extended operating temperature version)
(V
CC
= 4.0 to 5.5 V,
V
SS
= 0 V,
T
a
= –40 to 85
°
C, unless otherwise noted)
I
CC
μ
A
3.1.9 Electrical characteristics (Extended operating temperature version)
3.1.10 A-D converter characteristics (Extended operating temperature version)
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