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參數(shù)資料
| 型號(hào)： | M38049FFHSP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 8.4 MHz, MICROCONTROLLER, PDIP64 |
| 封裝： | 0.750 INCH, 1.78 MM PITCH, PLASTIC, SDIP-64 |
| 文件頁(yè)數(shù)： | 74/116頁(yè) |
| 文件大小： | 1261K |
| 代理商： | M38049FFHSP |
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Rev.1.01
Jan 25, 2005
page 60 of 114
REJ03B0131-0101Z
3804 Group (Spec. H)
[I2C Data Shift Register (S0)] 001116
The I2C data shift register (S0: address 001116) is an 8-bit shift
register to store receive data and write transmit data.
When transmit data is written into this register, it is transferred to
the outside from bit 7 in synchronization with the SCL, and each
time one-bit data is output, the data of this register are shifted by
one bit to the left. When data is received, it is input to this register
from bit 0 in synchronization with the SCL, and each time one-bit
data is input, the data of this register are shifted by one bit to the
left. The minimum 2 cycles of the internal clock
φ are required
from the rising of the SCL until input to this register.
The I2C data shift register is in a write enable status only when the
I2C-BUS interface enable bit (ES0 bit) of the I2C control register
(S1D: address 001416) is “1”. The bit counter is reset by a write in-
struction to the I2C data shift register. When both the ES0 bit and
the MST bit of the I2C status register (S1: address 001316) are “1,”
the SCL is output by a write instruction to the I2C data shift regis-
ter. Reading data from the I2C data shift register is always enabled
regardless of the ES0 bit value.
[I2C SlaveAddress Registers 0 to 2 (S0D0 to S0D2)]
0FF716 to 0FF916
The I2C slave address registers 0 to 2 (S0D0 to S0D2: addresses
0FF716 to 0FF916) consists of a 7-bit slave address and a read/
write bit. In the addressing mode, the slave address written in this
register is compared with the address data to be received immedi-
ately after the START condition is detected.
Bit 0: Read/write bit (RWB)
This is not used in the 7-bit addressing mode. In the 10-bit ad-
dressing mode, set RWB to “0” because the first address data to
be received is compared with the contents (SAD6 to SAD0 +
RWB) of the I2C slave address registers 0 to 2.
When 2-byte address data match slave address, a 7-bit slave ad-
dress which is received after restart condition has detected and
R/W data can be matched by setting “1” to RWB with software.
The RWB is cleared to “0” automatically when the stop condition is
detected.
Bits 1 to 7: Slave address (SAD0–SAD6)
These bits store slave addresses. Regardless of the 7-bit address-
ing mode or the 10-bit addressing mode, the address data
transmitted from the master is compared with these bits’ contents.
Fig. 57 Structure of I2C slave address registers 0 to 2
SAD6 SAD5SAD4SAD3SAD2SAD1SAD0RWB
Slave address
I2C slave address register 0
(S0D0: address 0FF716)
I2C slave address register 1
(S0D1: address 0FF816)
I2C slave address register 2
(S0D2: address 0FF916)
Read/write bit
b7
b0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M38049FFLHP#U0 | 制造商:Renesas Electronics Corporation 功能描述: |
| M38049RLSS | 功能描述:DEV EMULATOR CHIP RAM 2KB 64SDIP RoHS:否 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 內(nèi)電路編程器、仿真器以及調(diào)試器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 19/Jul/2010 標(biāo)準(zhǔn)包裝:1 系列:* 類型:* 適用于相關(guān)產(chǎn)品:* 所含物品:* |
| M3806 | 功能描述:電纜固定件和配件 LTSCG 625 BLACK RoHS:否 制造商:Heyco 類型:Cable Grips, Liquid Tight 材料:Nylon 顏色:Black 安裝方法:Cable 最大光束直徑:11.4 mm 抗拉強(qiáng)度: |
| M3806 BK001 | 制造商:Alpha Wire Company 功能描述:CBL 8COND 18AWG BLK 1000' |
| M3806 BK002 | 制造商:Alpha Wire Company 功能描述:CBL 8COND 18AWG BLK 500' |
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