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參數(shù)資料
| 型號： | M38073E4-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 0.80 MM PITCH, PLASTIC, QFP-80 |
| 文件頁數(shù)： | 54/77頁 |
| 文件大小： | 1126K |
| 代理商： | M38073E4-XXXFP |
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55
MITSUBISHI MICROCOMPUTERS
3807 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
NOTES ON PROGRAMMING
Processor Status Register
The contents of the processor status register (PS) after a reset are
undefined, except for the interrupt disable flag (I) which is "1." After a
reset, initialize flags which affect program execution. In particular, it
is essential to initialize the index X mode (T) and the decimal mode
(D) flags because of their effect on calculations.
Interrupts
The contents of the interrupt request bits do not change immediately
after they have been written. After writing to an interrupt request reg-
ister, execute at least one instruction before performing a BBC or
BBS instruction.
Decimal Calculations
To calculate in decimal notation, set the decimal mode flag (D) to
"1", then execute an ADC or SBC instruction. Only the ADC and
SBC instructions yield proper decimal results. After executing an
ADC or SBC instruction, execute at least one instruction before ex-
ecuting a SEC, CLC, or CLD instruction.
In decimal mode, the values of the negative (N), overflow (V), and
zero (Z) flags are invalid.
Timers
If a value n (between 0 and 255) is written to a timer latch, the fre-
quency division ratio is 1/(n+1).
Multiplication and Division Instructions
The index X mode (T) and the decimal mode (D) flags do not affect
the MUL and DIV instruction.
The execution of these instructions does not change the contents of
the processor status register.
Ports
The contents of the port direction registers cannot be read. The
following cannot be used:
The data transfer instruction (LDA, etc.)
The operation instruction when the index X mode flag (T) is "1"
The addressing mode which uses the value of a direction register
as an index
The bit-test instruction (BBC or BBS, etc.) to a direction register
The read-modify-write instructions (ROR, CLB, or SEB, etc.) to a
direction register.
Use instructions such as LDM and STA, etc., to set the port direction
registers.
Serial I/O
In clock synchronous serial I/O, if the receive side is using an
external clock and it is to output the SRDY1 signal, set the transmit
enable bit, the receive enable bit, and the SRDY1 output enable bit to
"1."
Serial I/O1 continues to output the final bit from the TXD pin after
transmission is completed. SOUT2 pin for serial I/O2 goes to high im-
pedance after transfer is completed.
When in serial I/O1 (clock-synchronous mode) or in serial I/O2 an
external clock is used as synchronous clock, write transmission data
to both the transmit buffer register and serial I/O2 register, during
transfer clock is “H.”
A-D Converter
The comparator uses internal capacitors whose charge will be lost if
the clock frequency is too low.
Therefore, make sure that f(XIN) is at least on 500 kHz during an A-D
_____
conversion. (When the ONW pin has been set to "L", the A-D conver-
sion will take twice as long to match the longer bus cycle, and so
f(XIN) must be at least 1 MHz.)
Do not execute the STP or WIT instruction during an A-D conver-
sion.
D-A Converter
The accuracy of the D-A converter becomes rapidly poor under the
VCC = 4.0 V or less condition; a supply voltage of VCC
≥ 4.0 V is
recommended. When a D-A converter is not used, set all values of
D-Ai conversion registers (i=1 to 4) to "0016."
Instruction Execution Time
The instruction execution time is obtained by multiplying the frequency
of the internal clock
φ by the number of cycles needed to execute an
instruction.
The number of cycles required to execute an instruction is shown in
the list of machine instructions.
The frequency of the internal clock
φ is half of the XIN frequency in
high-speed mode.
_____
When the ONW function is used in modes other than single-chip
mode, the frequency of the internal clock
φ may be one fourth of the
XIN frequency.
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