參數(shù)資料
型號(hào)： M38259EFGP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁(yè)數(shù)： 49/70頁(yè)
文件大?。?/td> 994K
代理商： M38259EFGP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
3825 Group
53
Notes 1 : When the P45/TXD P-channel output disable bit of the UART control register (bit 4 of address 001B16) is “0”.
2 : XOUT and XCOUT pins are excluded.
Serial I/O clock output “H” pulse width
Serial I/O clock output “L” pulse width
Serial I/O output delay time (Note 1)
Serial I/O output valid time (Note 1)
Serial I/O clock output rising time
Serial I/O clock output falling time
CMOS output rising time (Note 2)
CMOS output falling time (Note 2)
140
30
Symbol
Parameter
Limits
Min.
ns
Unit
tc(SCLK)/2–30
–30
10
Typ.
Max.
twH(SCLK)
twL(SCLK)
td(SCLK–TXD)
tv(SCLK–TXD)
tr(SCLK)
tf(SCLK)
tr(CMOS)
tf(CMOS)
Table 22. Switching characteristics 1 (Standard, One time PROM version)
(VCC = 4.0 to 5.5 V, VSS = 0 V, Ta = –20 to 85°C, unless otherwise noted.)
ns
Unit
Notes 1 : When the P45/TXD P-channel output disable bit of the UART control register (bit 4 of address 001B16) is “0”.
2 : XOUT and XCOUT pins are excluded.
Serial I/O clock output “H” pulse width
Serial I/O clock output “L” pulse width
Serial I/O output delay time (Note 1)
Serial I/O output valid time (Note 1)
Serial I/O clock output rising time
Serial I/O clock output falling time
CMOS output rising time (Note 2)
CMOS output falling time (Note 2)
350
50
Symbol
Parameter
Limits
Min.
tc(SCLK)/2–50
–30
20
Max.
twH(SCLK)
twL(SCLK)
td(SCLK–TXD)
tv(SCLK–TXD)
tr(SCLK)
tf(SCLK)
tr(CMOS)
tf(CMOS)
Typ.
Table 23. Switching characteristics 2 (Standard, One time PROM version)
(VCC = 2.5 to 4.0 V, VSS = 0 V, Ta = –20 to 85°C, unless otherwise noted.)
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