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參數(shù)資料
| 型號： | M38268MCLXXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 20 MM, 0.65 PITCH, PLASTIC, QFP-100 |
| 文件頁數(shù)： | 49/68頁 |
| 文件大小： | 1169K |
| 代理商： | M38268MCLXXXFP |
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Rev.1.00
Aug 06, 2008
page 51 of 64
REJ03B0251-0100
4286 Group
Skip condition
Detailed description
Carry
flag
CY
Continuous
description
–
Overflow = 0
–
(CY) = 0
–
0/1
–
0/1
–
1
0
–
0/1
–
Loads the value n in the immediate field to register A.
When the LA instructions are continuously coded and executed, only the first LA instruction is executed
and other LA instructions coded continuously are skipped.
Transfers bits 7 to 4 to register B and bits 3 to 0 to register A when URS flag is cleared to “0.” These bits
7 to 0 are the ROM pattern in address (DR2 DR1 DR0 A3 A2 A1 A0) specified by registers A and D in
page p.
Transfers bit 8 of ROM pattern is transferred to flag CY when URS flag is set to “1” (after the URSC
instruction is executed).
(One of stack is used when the TABP p instruction is executed.)
Adds the contents of M(DP) to register A. Stores the result in register A. The contents of carry flag CY
remains unchanged.
Adds the contents of M(DP) and carry flag CY to register A. Stores the result in register A and carry flag
CY.
Adds the value n in the immediate field to register A.
The contents of carry flag CY remains unchanged.
Skips the next instruction when there is no overflow as the result of operation.
Sets (1) to carry flag CY.
Clears (0) to carry flag CY.
Skips the next instruction when the contents of carry flag CY is “0.”
Stores the one‘s complement for register A‘s contents in register A.
Rotates 1 bit of the contents of register A including the contents of carry flag CY to the right.
Executes the logic operation selected by logic operation selection register LO between the contents of
register A and register E, and stores the result in register A.
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