參數(shù)資料
型號： M38271M2MXXXHP
廠商： Mitsubishi Electric Corporation
英文描述： Single, Low Power, Rail-to-Rail Input/Output Operational Amplifier w/Shutdown 8-SOIC 0 to 70
中文描述： 單芯片8位CMOS微機(jī)
文件頁數(shù)： 35/70頁
文件大?。?/td> 1112K
代理商： M38271M2MXXXHP
35
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
3827 Group
LCD DRIVE CONTROL CIRCUIT
The 3827 group has the built-in Liquid Crystal Display (LCD) drive
control circuit consisting of the following.
G
LCD display RAM
G
Segment output enable register
G
LCD mode register
G
Voltage multiplier
G
Selector
G
Timing controller
G
Common driver
G
Segment driver
G
Bias control circuit
A maximum of 40 segment output pins and 4 common output pins
can be used.
Fig. 38 Structure of LCD mode register
Up to 160 pixels can be controlled for LCD display. When the LCD
enable bit is set to “1” after data is set in the LCD mode register,
the segment output enable register and the LCD display RAM, the
LCD drive control circuit starts reading the display data automati-
cally, performs the bias control and the duty ratio control, and
displays the data on the LCD panel.
Table 7 Maximum number of display pixels at each duty ratio
Duty ratio
Maximum number of display pixel
80 dots
or 8 segment LCD 10 digits
120 dots
or 8 segment LCD 15 digits
160 dots
or 8 segment LCD 20 digits
2
3
4
Segment output enable bit 0
0 : Output ports P3
0
–P3
5
1 : Segment output SEG
18
–SEG
23
Segment output enable bit 1
0 : Output ports P3
6
, P3
7
1 : Segment output SEG
24
,SEG
25
Segment output enable bit 2
0 : I/O ports P0
0
–P0
5
1 : Segment output SEG
26
–SEG
31
Segment output enable bit 3
0 : I/O ports P0
6
,P0
7
1 : Segment output SEG
32
,SEG
33
Segment output enable bit 4
0 : I/O port P1
0
1 : Segment output SEG
34
Segment output enable bit 5
0 : I/O ports P1
1
–P1
5
1 : Segment output SEG
35
–SEG
39
LCD output enable bit
0 : Disable
1 : Enable
Not used (return “0” when read)
(Do not write “1” to this bit)
Segment output enable register
(SEG : address 0038
16
)
b7
b0
LCD mode register
(LM : address 0039
16
)
Duty ratio selection bits
0 0 : Not used
0 1 : 2 duty (use COM
0
, COM
1
)
1 0 : 3 duty (use COM
0
–COM
2
)
1 1 : 4 duty (use COM
0
–COM
3
)
Bias control bit
0 : 1/3 bias
1 : 1/2 bias
LCD enable bit
0 : LCD OFF
1 : LCD ON
Voltage multiplier control bit
0 : Voltage multiplier disabled
1 : Voltage multiplier enabled
LCD circuit divider division ratio selection bits
0 0 : 1 division of clock input
0 1 : 2 division of clock input
1 0 : 4 division of clock input
1 1 : 8 division of clock input
LCDCK count source selection bit (Note)
0 : f(X
CIN
)/32
1 : f(X
IN
)/8192 (f(X
CIN
)/8192 in low-speed mode)
Note :
LCDCK is a clock for a LCD timing controller.
b7
b0
相關(guān)PDF資料
PDF描述
M38271M3-XXXGP Single, Low Power, Rail-to-Rail Input/Output Operational Amplifier w/Shutdown 8-SOIC 0 to 70
M38271M3-XXXHP Single, Low Power, Rail-to-Rail Input/Output Operational Amplifier w/Shutdown 8-SOIC 0 to 70
M38271M3MXXXFP Single, Low Power, Rail-to-Rail Input/Output Operational Amplifier w/Shutdown 8-PDIP 0 to 70
M38271M3MXXXFS Single, Low Power, Rail-to-Rail Input/Output Operational Amplifier w/Shutdown 8-PDIP 0 to 70
M38271M3MXXXGP Single, Low Power, Rail-to-Rail Input/Output Operational Amplifier w/Shutdown 8-SOIC -40 to 125
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M3828 BK001 制造商:Alpha Wire Company 功能描述:CBL 3COND 16AWG BLK 1000'
M3828 BK002 制造商:Alpha Wire Company 功能描述:CBL 3COND 16AWG BLK 500'
M3828 BK005 制造商:Alpha Wire Company 功能描述:CBL 3COND 16AWG BLK 100'
M3828 BK199 制造商:Alpha Wire Company 功能描述:CBL 3COND 16AWG BLK 3000=3000'
M3829 BK001 制造商:Alpha Wire Company 功能描述:CBL 4COND 16AWG BLK 1000'
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*