參數(shù)資料
型號(hào)： M38272E3MXXXFS
廠商： Mitsubishi Electric Corporation
英文描述： Single, Low Power, Rail-to-Rail Input/Output Operational Amplifier w/Shutdown 20-LCCC -55 to 125
中文描述： 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù)： 57/70頁(yè)
文件大小： 1112K
代理商： M38272E3MXXXFS
57
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
3827 Group
Table 22 Switching characteristics 1
(V
CC
= 4.0 to 5.5 V, V
SS =
0 V, Ta = –20 to 85
°
C, unless otherwise noted)
Notes1:
When the P4
5
/T
X
D P-channel output disable bit of the UART control register (bit 4 of address 001B
16
) is “0”.
2:
X
OUT
and X
COUT
pins are excluded.
Serial I/O1 clock output “H” pulse width
Serial I/O1 clock output “L” pulse width
Serial I/O1 output delay time
(Note 1)
Serial I/O1 output valid time
(Note 1)
Serial I/O1 clock output rising time
Serial I/O1 clock output falling time
Serial I/O2 clock output “H” pulse width
Serial I/O2 clock output “L” pulse width
Serial I/O2 output delay time
Serial I/O2 output valid time
Serial I/O2 clock output falling time
CMOS output rising time
(Note 2)
CMOS output falling time
(Note 2)
140
30
30
0.2
t
C
(S
CLK2
)
40
30
30
Symbol
Parameter
Limits
Min.
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
t
C
(S
CLK1
)/2–30
t
C
(S
CLK1
)/2–30
–30
10
10
Typ.
Max.
t
wH(S
CLK1
)
t
wL(S
CLK1
)
t
d(S
CLK1
–T
X
D)
t
v(S
CLK1
–T
X
D)
t
r(S
CLK1
)
t
f(S
CLK1
)
t
wH(S
CLK2
)
t
wL(S
CLK2
)
t
d(S
CLK2
–S
OUT2
)
t
v(S
CLK2
–S
OUT2
)
t
f(S
CLK2
)
t
r(CMOS)
t
f(CMOS)
Table 23 Switching characteristics 2
(V
CC
= 2.2 to 4.0 V, V
SS =
0 V, Ta = –20 to 85
°
C, unless otherwise noted)
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
Notes1:
When the P4
5
/T
X
D P-channel output disable bit of the UART control register (bit 4 of address 001B
16
) is “0”.
2:
X
OUT
and X
COUT
pins are excluded.
Serial I/O1 clock output “H” pulse width
Serial I/O1 clock output “L” pulse width
Serial I/O1 output delay time
(Note 1)
Serial I/O1 output valid time
(Note 1)
Serial I/O1 clock output rising time
Serial I/O1 clock output falling time
Serial I/O2 clock output “H” pulse width
Serial I/O2 clock output “L” pulse width
Serial I/O2 output delay time
Serial I/O2 output valid time
Serial I/O2 clock output falling time
CMOS output rising time
(Note 2)
CMOS output falling time
(Note 2)
350
50
50
0.2
t
C
(S
CLK2
)
50
50
50
Symbol
Parameter
Limits
Min.
t
C
(S
CLK1
)/2–50
t
C
(S
CLK1
)/2–50
–30
20
20
Max.
t
wH(S
CLK1
)
twL(S
CLK1
)
t
d(S
CLK1
–T
X
D)
t
v(S
CLK1
–T
X
D)
t
r(S
CLK1
)
t
f(S
CLK1
)
t
wH(S
CLK2
)
t
wL(S
CLK2
)
t
d(S
CLK2
–S
OUT2
)
t
v(S
CLK2
–S
OUT2
)
t
f(S
CLK2
)
t
r(CMOS)
t
f(CMOS)
Typ.
t
C
(S
CLK2
)/2–160
t
C
(S
CLK2
)/2–160
0
t
C
(S
CLK2
)/2–240
t
C
(S
CLK2
)/2–240
0
相關(guān)PDF資料
PDF描述
M38272E3MXXXGP Single, Low Power, Rail-to-Rail Input/Output Operational Amplifier w/Shutdown 10-CFP -55 to 125
M38272E3MXXXHP Single, Low Power, Rail-to-Rail Input/Output Operational Amplifier w/Shutdown 8-CDIP -55 to 125
M38272E4MXXXFP Single, Low Power, Rail-to-Rail Input/Output Operational Amplifier w/Shutdown 20-LCCC -55 to 125
M38272E4MXXXGP Single, Low Power, Rail-to-Rail Input/Output Operational Amplifier w/Shutdown 8-CDIP -55 to 125
M38272E4MXXXHP Single, Low Power, Rail-to-Rail Input/Output Operational Amplifier w/Shutdown 10-CFP -55 to 125
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M3828 BK001 制造商:Alpha Wire Company 功能描述:CBL 3COND 16AWG BLK 1000'
M3828 BK002 制造商:Alpha Wire Company 功能描述:CBL 3COND 16AWG BLK 500'
M3828 BK005 制造商:Alpha Wire Company 功能描述:CBL 3COND 16AWG BLK 100'
M3828 BK199 制造商:Alpha Wire Company 功能描述:CBL 3COND 16AWG BLK 3000=3000'
M3829 BK001 制造商:Alpha Wire Company 功能描述:CBL 4COND 16AWG BLK 1000'
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*