參數(shù)資料
型號: M38273M8MXXXFP
廠商: Mitsubishi Electric Corporation
英文描述: Dual Low-Power, Rail-to-Rail Input/Output Operational Amplifier w/Shutdown 14-CDIP -55 to 125
中文描述: 單芯片8位CMOS微機
文件頁數(shù): 46/70頁
文件大小: 1112K
代理商: M38273M8MXXXFP
46
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
3827 Group
MITSUBISHI MICROCOMPUTERS
Fig. 53 Clock generating circuit block diagram
WIT
instruction
STP instruction
Timing
φ
(Internal clock)
S
R
Q
STP instruction
S
R
Q
Main clock stop bit
S
R
Q
Timer 2
Timer 1
1/2
1/4
X
IN
X
OUT
X
COUT
X
CIN
Interrupt request
Reset
Timer 1 count
source selection
bit
Timer 2 count
source selection
bit
Low-speed mode
“0”
Middle-/High-speed mode
Internal system clock selection bit
(Note)
Middle-speed mode
“1”
High-speed mode
or Low-speed mode
Note:
When selecting the X
C
oscillation, set the port X
C
switch bit to “1” .
Main clock division ratio selection bit
“1”
“1”
“0”
“1”
“0”
Interrupt disable flag I
1/2
“0”
相關PDF資料
PDF描述
M38273M8MXXXFS Dual Low-Power, Rail-to-Rail Input/Output Operational Amplifier w/Shutdown 14-CDIP -55 to 125
M38273M8MXXXGP Dual Low-Power, Rail-to-Rail Input/Output Operational Amplifier w/Shutdown 20-LCCC -55 to 125
M38273M8MXXXHP Dual Low-Power, Rail-to-Rail Input/Output Operational Amplifier w/Shutdown 14-CDIP -55 to 125
M38273M9MXXXFS Dual Low-Power, Rail-to-Rail Input/Output Operational Amplifier w/Shutdown 20-LCCC -55 to 125
M38273M9MXXXGP Dual Low-Power, Rail-to-Rail Input/Output Operational Amplifier w/Shutdown 14-CDIP
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