參數(shù)資料
型號(hào)： M38275ECMXXXHP
廠商： Mitsubishi Electric Corporation
英文描述： Dual Low-Power Rail-to-Rail Input/Output Op Amp w/Shutdown 14-PDIP -40 to 125
中文描述： 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù)： 27/70頁(yè)
文件大?。?/td> 1112K
代理商： M38275ECMXXXHP
27
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
3827 Group
[Transmit Buffer/Receive Buffer Register
(TB/RB)] 0018
16
The transmit buffer register and the receive buffer register are lo-
cated at the same address. The transmit buffer register is
write-only and the receive buffer register is read-only. If a charac-
ter bit length is 7 bits, the MSB of data stored in the receive buffer
register is “0”.
[Serial I/O1 Status Register (SIO1STS)]
0019
16
The read-only serial I/O1 status register consists of seven flags
(bits 0 to 6) which indicate the operating status of the serial I/O
function and various errors.
Three of the flags (bits 4 to 6) are valid only in UART mode.
The receive buffer full flag (bit 1) is cleared to “0” when the receive
buffer is read.
If there is an error, it is detected at the same time that data is
transferred from the receive shift register to the receive buffer reg-
ister, and the receive buffer full flag is set. A write to the serial I/O1
status register clears all the error flags OE, PE, FE, and SE. Writ-
ing “0” to the serial I/O1 enable bit (SIOE) also clears all the status
flags, including the error flags.
All bits of the serial I/O1 status register are initialized to “0” at re-
set, but if the transmit enable bit (bit 4) of the serial I/O1 control
register has been set to “1”, the transmit shift register shift comple-
tion flag (bit 2) and the transmit buffer empty flag (bit 0) become
“1”.
[Serial I/O1 Control Register (SIO1CON)]
001A
16
The serial I/O1 control register contains eight control bits for the
serial I/O1 function.
[UART Control Register (UARTCON) ]001B
16
This is a 5 bit register containing four control bits, which are valid
when UART is selected and set the data format of an data re-
ceiver/transfer, and one control bit, which is always valid and sets
the output structure of the P4
5
/T
X
D pin.
[Baud Rate Generator(BRG)] 0016
16
The baud rate generator determines the baud rate for serial trans-
fer.
The baud rate generator divides the frequency of the count source
by 1/(n + 1), where n is the value written to the baud rate genera-
tor.
相關(guān)PDF資料
PDF描述
M38275EEMXXXGP Dual Low-Power Rail-to-Rail Input/Output Op Amp w/Shutdown 14-SOIC -40 to 125
M38275EEMXXXHP Dual Low-Power Rail-to-Rail Input/Output Op Amp w/Shutdown 14-SOIC -40 to 125
M38275M1-XXXFP Dual Low-Power Rail-to-Rail Input/Output Op Amp w/Shutdown 14-SOIC -40 to 125
M38275M1-XXXFS Dual Low-Power Rail-to-Rail Input/Output Op Amp w/Shutdown 14-SOIC -40 to 125
M38275M1-XXXGP Dual Low-Power Rail-to-Rail Input/Output Op Amp w/Shutdown 14-PDIP -40 to 125
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