11
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
3827 Group
I/O PORTS
Direction Registers
The I/O ports have direction registers which determine the input/
output direction of each individual pin. (P0
0
–P0
7
and P1
0
–P1
5
use
bit 0 of port P0, P1 direction registers respectively.)
When “1” is written to that bit, that pin becomes an output pin.
When “0” is written to the bit corresponding to a pin, that pin be-
comes an input pin.
latch is read, not the value of the pin itself. Pins set to input are
floating and the value of that pin can be read. If a pin set to input
is written to, only the port output latch is written to and the pin re-
mains floating.
Port P3 Output Control Register
Bit 0 of the port P3 output control register (address 0007
16
) en-
ables control of the output of ports P3
0
to P3
7
.
When the bit is set to “1”, the port output function is valid.
When resetting, bit 0 of the port P3 output control register is set to
“0” (the port output function is invalid.) and ports P3
0
to P3
7
are
pulled up.
Pull-up Control
By setting the PULL register A (address 0016
16
) or the PULL reg-
ister B (address 0017
16
), ports P0 to P6 can control pull-up with a
program.
However, the contents of PULL register A and PULL register B do
not affect ports programmed as the output ports.
The PULL register A setting is invalid for pins set to segment out-
put on the segment output enable register.
Fig. 9 Structure of PULL register A and PULL register B
P0
0
,
P
0
1
pull-up
P0
2
,
P0
3
pull-up
P0
4
–P0
7
pull-up
P1
0
–P1
3
pull-up
P1
4
,
P1
5
pull-up
P1
6
,
P1
7
pull-up
P2
0
–P2
3
pull-up
P2
4
–P2
7
pull-up
PULL register A
(PULLA : address 0016
16
)
b7
b0
P4
1
–P4
3
pull-up
P4
4
–P4
7
pull-up
P5
0
–P5
3
pull-up
P5
4
–P5
7
pull-up
P6
0
–P6
3
pull-up
P6
4
–P6
7
pull-up
Not used (return “0” when read)
0 : No pull-up
1 : Pull-up
PULL register B
(PULLB : address 0017
16
)
b7
b0
Note :
The contents of PULL register A and PULL register B
do not affect ports programmed as the output port.