- 您現在的位置：買賣IC網 > PDF目錄370924 > M38276M2-XXXFP (Mitsubishi Electric Corporation) 12-Bit 200 kSPS ADC Ser. Out, Auto Pwrdn (S/W and H/W), Low Power W/8 x FIFO W/4 Ch. 16-SOIC -40 to 85 PDF資料下載
參數資料
| 型號： | M38276M2-XXXFP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 12-Bit 200 kSPS ADC Ser. Out, Auto Pwrdn (S/W and H/W), Low Power W/8 x FIFO W/4 Ch. 16-SOIC -40 to 85 |
| 中文描述： | 單芯片8位CMOS微機 |
| 文件頁數： | 38/70頁 |
| 文件大?。?/td> | 1112K |
| 代理商： | M38276M2-XXXFP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁當前第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁
38
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
3827 Group
MITSUBISHI MICROCOMPUTERS
Common Pin and Duty Ratio Control
The common pins (COM
0
–COM
3
) to be used are determined by
duty ratio.
Select duty ratio by the duty ratio selection bits (bits 0 and 1 of the
LCD mode register).
When releasing from reset, the V
CC
(V
L3
) voltage is output from
the common pins.
Table 9 Duty ratio control and common pins used
Duty
ratio
Common pins used
Notes1:
COM
2
and COM
3
are open.
2:
COM
3
is open.
Bit 1
0
1
1
Bit 0
1
0
1
COM
0
, COM
1
(Note 1)
COM
0
–COM
2
(Note 2)
COM
0
–COM
3
Duty ratio selection bit
2
3
4
Segment Signal Output Pin
Segment signal output pins are classified into the segment-only
pins (SEG
0
–SEG
17
), the segment/output port pins (SEG
18
–
SEG
25
), and the segment/I/O port pins (SEG
26
–SEG
39
).
Segment signals are output according to the bit data of the LCD
RAM corresponding to the duty ratio. After reset release, a V
CC
(=V
L3
) voltage is output to the segment-only pins and the seg-
ment/output port pins are pulled up to the V
CC
(=V
L3
) voltage in
the high impedance condition. The segment/I/O port pins are set
to input ports, and V
CC
(=V
L3
) is applied to them by pull-up resis-
tor.
LCD Display RAM
Address 0040
16
to 0053
16
is the designated RAM for the LCD dis-
play. When “1” are written to these addresses, the corresponding
segments of the LCD display panel are turned on.
LCD Drive Timing
The LCDCK timing frequency (LCD drive timing) is generated in-
ternally and the frame frequency can be determined with the
following equation;
f(LCDCK) =
Frame frequency =
Fig. 41 LCD display RAM map
(frequency of count source for LCDCK)
(divider division ratio for LCD)
f(LCDCK)
(duty ratio)
Bit
address
7
6
5
4
3
2
1
0
0040
16
0041
16
0042
16
0043
16
0044
16
0045
16
0046
16
SEG
1
SEG
3
SEG
5
SEG
7
SEG
9
SEG
0
SEG
2
SEG
4
SEG
6
SEG
8
SEG
10
COM
3
COM
2
COM
1
COM
0
SEG
12
SEG
14
SEG
16
SEG
18
SEG
20
SEG
22
SEG
24
SEG
26
SEG
28
SEG
30
SEG
32
SEG
34
SEG
36
SEG
38
SEG
21
SEG
23
SEG
25
SEG
27
SEG
29
SEG
11
SEG
13
SEG
15
SEG
17
SEG
19
SEG
31
SEG
33
SEG
35
SEG
37
SEG
39
0047
16
0048
16
0049
16
004A
16
004B
16
004C
16
004D
16
004E
16
004F
16
0050
16
0051
16
0052
16
0053
16
COM
3
COM
2
COM
1
COM
0
相關PDF資料 |
PDF描述 |
|---|---|
| M38276M2-XXXFS | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38276M2-XXXGP | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38276M2-XXXHP | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38276M2MXXXFP | 12-Bit 200 kSPS ADC Ser. Out, Auto Pwrdn (S/W and H/W), Low Power W/8 x FIFO W/4 Ch. 16-TSSOP -40 to 85 |
| M38276M2MXXXFS | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
相關代理商/技術參數 |
參數描述 |
|---|---|
| M3828 BK001 | 制造商:Alpha Wire Company 功能描述:CBL 3COND 16AWG BLK 1000' |
| M3828 BK002 | 制造商:Alpha Wire Company 功能描述:CBL 3COND 16AWG BLK 500' |
| M3828 BK005 | 制造商:Alpha Wire Company 功能描述:CBL 3COND 16AWG BLK 100' |
| M3828 BK199 | 制造商:Alpha Wire Company 功能描述:CBL 3COND 16AWG BLK 3000=3000' |
| M3829 BK001 | 制造商:Alpha Wire Company 功能描述:CBL 4COND 16AWG BLK 1000' |
發(fā)布緊急采購，3分鐘左右您將得到回復。