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參數(shù)資料
| 型號： | M38503M4H-XXXSP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁數(shù)： | 55/86頁 |
| 文件大小： | 1193K |
| 代理商： | M38503M4H-XXXSP |
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55
3850 Group (Spec. H)
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Standard serial I/O mode
The standard serial I/O mode inputs and outputs the software com-
mands, addresses and data needed to operate (read, program,
erase, etc.) the internal flash memory. This I/O is clock synchronized
serial. This modes require a purpose-specific peripheral unit.
The standard serial I/O mode is different from the parallel I/O mode
in that the CPU controls flash memory rewrite (uses the CPU's re-
write mode), rewrite data input and so forth. The standard serial I/O
mode is started by connecting
“
H
”
to the P4
1
(INT
0
) pin and
“
H
”
to the
CNV
SS
pin (when V
CC
= 4.5 V to 5.5 V, connect to V
CC
; when V
CC
=
2.7 V to 4.5 V, supply 4.5 V to 5.5 V to Vpp from an external source),
and releasing the reset operation. (In the ordinary command mode,
set CNVss pin to
“
L
”
level.)
This control program is written in the boot ROM area when the prod-
uct is shipped from Mitsubishi. Accordingly, make note of the fact
that the standard serial I/O mode cannot be used if the boot ROM
area is rewritten in the parallel I/O mode. Figure 56 shows the pin
connections for the standard serial I/O mode. Serial data I/O uses SI/
O1 data serially in 8-bit units.
To use standard serial I/O mode. The operation uses the four SI/O1
pins S
CLK
, RxD, TxD and S
RDY1
(BUSY). The S
CLK
pin is the trans-
fer clock input pin through which an external transfer clock is input.
The TxD pin is for CMOS output. The S
RDY1
(BUSY) pin outputs an
“
L
”
level when ready for reception and an
“
H
”
level when reception
starts.
In the standard serial I/O mode, only the user ROM area indicated in
Figure 44 can be rewritten. The boot ROM cannot.
In the standard serial I/O mode, a 7-byte ID code is used. When
there is data in the flash memory, commands sent from the periph-
eral unit (programmer) are not accepted unless the ID code
matches.
Overview of standard serial I/O mode
In standard serial I/O mode, software commands, addresses and
data are input and output between the MCU and peripheral units
(serial programer, etc.) using 4-wire clock-synchronized serial I/O
(SI/O1).
In reception, software commands, addresses and program data are
synchronized with the rise of the transfer clock that is input to the
S
CLK
pin, and are then input to the MCU via the RxD pin. In transmis-
sion, the read data and status are synchronized with the fall of the
transfer clock, and output from the TxD pin.
The TxD pin is for CMOS output. Transfer is in 8-bit units with LSB
first.
When busy, such as during transmission, reception, erasing or pro-
gram execution, the S
RDY1
(BUSY) pin is
“
H
”
level. Accordingly, al-
ways start the next transfer after the S
RDY1
(BUSY) pin is
“
L
”
level.
Also, data and status registers in memory can be read after inputting
software commands. Status, such as the operating state of the flash
memory or whether a program or erase operation ended success-
fully or not, can be checked by reading the status register. Here fol-
lowing are explained software commands, status registers, etc.
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